M25PX32-VMW6F NUMONYX, M25PX32-VMW6F Datasheet - Page 35

• Manufacturer Part Number: M25PX32-VMW6F
• Description: IC SRL FLSH 32MB DUAL IO 3V SO8W
• Manufacturer: NUMONYX
• Series: Forté™r

Specifications of M25PX32-VMW6F

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 32M (4M x 8)
• Speed: 75MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: M25PX32-VMW6FCT

6.8
Dual Output Fast Read (DOFR)
The Dual Output Fast Read (DOFR) instruction is very similar to the Read Data Bytes at
higher speed (FAST_READ) instruction, except that the data are shifted out on two pins (pin
DQ0 and pin DQ1) instead of only one. Outputting the data on two pins instead of one
doubles the data transfer bandwidth compared to the Read Data Bytes at higher speed
(FAST_READ) instruction.
The device is first selected by driving Chip Select (S) Low. The instruction code for the Dual
Output Fast Read instruction is followed by a 3-byte address (A23-A0) and a dummy byte,
each bit being latched-in during the rising edge of Serial Clock (C). Then the memory
contents, at that address, are shifted out on DQ0 and DQ1 at a maximum frequency f
during the falling edge of Serial Clock (C).
The instruction sequence is shown in
The first byte addressed can be at any location. The address is automatically incremented
to the next higher address after each byte of data is shifted out on DQ0 and DQ1. The whole
memory can, therefore, be read with a single Dual Output Fast Read (DOFR) instruction.
When the highest address is reached, the address counter rolls over to 00 0000h, so that
the read sequence can be continued indefinitely.
Figure 16. Dual Output Fast Read instruction sequence
1. A23 to A22 are Don't care.
DQ0
DQ0
DQ1
DQ1
C
S
C
S
Mode 3
Mode 2
32 33 34
Dummy byte
0
35
1
36 37 38 39 40 41 42 43 44 45 46
2
Instruction
High Impedance
3
4
MSB
5
6
7
DATA OUT 1
6
Figure
4
5
7
2
3
23 22 21
8
0
1
16.
MSB
9 10
6
7
DATA OUT 2 DATA OUT 3
24-bit address
4
5
2
3
3
28 29 30 31
0
1
47
2
MSB
6
7
1
4
5
0
2
3
0
1
MSB
6
7
DATA OUT n
4
5
2
3
0
1
MSB
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C
,
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