TC835CPI Microchip Technology, TC835CPI Datasheet - Page 10

• Manufacturer Part Number: TC835CPI
• Description: IC ADC 4 1/2DGT BCD 28-DIP
• Manufacturer: Microchip Technology

Specifications of TC835CPI

• Display Type: LED
• Configuration: 7 Segment
• Interface: BCD
• Digits Or Characters: A/D 4.5 Digits
• Current - Supply: 1mA
• Voltage - Supply: 4 V ~ 6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 28-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TC835
FIGURE 5-2:
Outputs.
5.1
When left open, this pin assumes a logic "1" level. With
a RUN/HOLD = 1, the TC835 performs conversions
continuously, with a new measurement cycle beginning
every 40,002 clock pulses.
When RUN/HOLD changes to a logic "0," the measure-
ment cycle in progress will be completed, and data held
and displayed as long as the logic "0" condition exists.
A positive pulse (> 300 ns) at RUN/HOLD initiates a
new measurement cycle. The measurement cycle in
progress when RUN/HOLD initially assumed the logic
"0" state must be completed before the positive pulse
can be recognized as a single conversion run
command.
The
10,001-count auto zero phase. At the end of this phase,
the busy signal goes high.
DS21478C-page 10
Underrange when
Overrange when
for Overrange
Applicable
Applicable
Digit Scan
new
Digit Scan
STROBE
Integrator
RUN/HOLD Input
Output
Busy
measurement
Expanded Scale Below
Counts
*
System
10,001
Counts
D5
Zero
100
D4
Auto-Zero
D3
Full Measurement Cycle
D2
D1
Integrate
40,002 Counts
Timing Diagrams for
Counts
10,000
(Fixed)
Signal
* First D5 of System Zero and
Reference Integrate One Count
Longer
cycle
Counts (Max)
Reference
Integrate
Integrate
20,001
D5
D4
D3
D2
D1
Signal
begins
*
Reference
Integrate
with
a
5.2
During the measurement cycle, the STROBE control
line is pulsed low five times. The five low pulses occur
in the center of the digit drive signals (D
(see
D
ment cycles end. In the center of the D
clock pulses after the end of the measurement cycle,
the first STROBE occurs for one-half clock pulse. After
the D
The STROBE goes low 100 clock pulses after D
high. This continues through the D
The digit drive signals will continue to permit display
scanning. STROBE pulses are not repeated until a new
measurement is completed. The digit drive signals will
not continue if the previous signal resulted in an
overrange condition.
The active low STROBE pulses aid BCD data transfer
to UARTs, processors and external latches.
FIGURE 5-3:
Times Per Conversion.
5.3
At the beginning of the signal integration phase, BUSY
goes high and remains high until the first clock pulse
after the integrator zero crossing. BUSY returns to the
logic "0" state after the measurement cycle ends in an
overrange condition. The internal display latches are
loaded during the first clock pulse after BUSY and are
latched at the clock pulse end. The BUSY signal does
not go high at the beginning of the measurement cycle,
which starts with the auto zero cycle.
STROBE
5
B1 B8
(MSD) goes high for 201 counts when the measure-
TC835
Outputs
*Delay between Busy going Low and First STROBE pulse is
Busy
dependent on Analog Input.
Figure
D5
D4
D3
D2
D1
5
digit strobe, D
*
STROBE Output
BUSY Output
Counts
(MSD)
Data
5-3).
201
D5
End of Conversion
Counts
200
Counts
Data
200
D4
4
Strobe Signal Low Five
goes high for 200 clock pulses.
© 2007 Microchip Technology Inc.
Counts
Data
200
D3
Counts
Data
200
D2
1
digit drive pulse.
Counts
(LSD)
Data
200
D1
1
5
, D
Note Absence
of STROBE
pulse, 101
2
Counts
, D
Data
200
D5
4
3
goes
, D
5
)