TC7126ACLW713 Microchip Technology, TC7126ACLW713 Datasheet - Page 9

• Manufacturer Part Number: TC7126ACLW713
• Description: IC ADC 3 1/2DGT LCD DVR 44-PLCC
• Manufacturer: Microchip Technology

Specifications of TC7126ACLW713

• Display Type: LCD
• Configuration: 7 Segment
• Digits Or Characters: A/D 3.5 Digits
• Current - Supply: 55µA
• Voltage - Supply: 9V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-PLCC
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Interface: -

3.0
(All Pin Designations Refer to 40-Pin PDIP.)
3.1
The TC7126A is a dual slope, integrating analog-to-
digital converter. An understanding of the dual slope
conversion technique will aid in following the detailed
TC7126/A operation theory.
The conventional dual slope converter measurement
cycle has two distinct phases:
• Input Signal Integration
• Reference Voltage Integration (De-integration)
The input signal being converted is integrated for a
fixed time period (T
clock pulses. An opposite polarity constant reference
voltage is then integrated until the integrator output
voltage returns to zero. The reference integration time
is directly proportional to the input signal (T
Figure ).
FIGURE 3-1:
In a simple dual slope converter, a complete conver-
sion requires the integrator output to “ramp-up” and
“ramp-down.”
A simple mathematical equation relates the input
signal, reference voltage and integration time:
© 2006 Microchip Technology Inc.
Analog
Signal
Voltage
Input
Integrate
REF
Signal
Fixed
Time
DETAILED DESCRIPTION
Dual Slope Conversion Principles
Polarity Control
Variable
Reference
Integrate
Time
Display
Switch
Driver
Integrator
SI
). Time is measured by counting
–
+
Basic Dual Slope Converter
Phase
Control
V
V
IN
IN
» V
» 1.2 V
–
+
REF
Comparator
Control
REF
Logic
Counter
RI
Clock
) (see
EQUATION 3-1:
For a constant V
EQUATION 3-2:
The dual slope converter accuracy is unrelated to the
integrating resistor and capacitor values, as long as
they are stable during a measurement cycle. Noise
immunity is an inherent benefit. Noise spikes are inte-
grated or averaged to zero during integration periods.
Integrating ADCs are immune to the large conversion
errors that plague successive approximation convert-
ers in high noise environments. Interfering signals with
frequency components at multiples of the averaging
period will be attenuated. Integrating ADCs commonly
operate with the signal integration period set to a
multiple of the 50Hz/60Hz power line period (see
Figure 3-2).
FIGURE 3-2:
Dual Slope Converter
Where:
V
T
T
SI
RI
R
30
20
10
0
= Reference voltage
= Signal integration time (fixed)
= Reference voltage integration time (variable)
0.1/t
RC
1
IN
V
∫
:
IN
T
0
SI
Normal Mode Rejection of
=
Input Frequency
V
IN
V
(t)d
R
t = Measurement Period
1/t
TC7126/A
T
------ -
T
t
=
RI
SI
V
RC
R
T
RI
DS21458C-page 9
10/t