MAX8751ETJ+ Maxim Integrated Products, MAX8751ETJ+ Datasheet - Page 24

• Manufacturer Part Number: MAX8751ETJ+
• Description: IC CNTRLR CCFL INV 32-TQFN
• Manufacturer: Maxim Integrated Products
• Type: CCFL Controllerr

Specifications of MAX8751ETJ+

• Frequency: 30 ~ 80 kHz
• Current - Supply: 3.2mA
• Voltage - Supply: 6 V ~ 28 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Lead Free Status / Rohs Status: Details

Fixed-Frequency, Full-Bridge CCFL
Inverter Controller
30µA, the rise time is about three times longer than the
fall time.
The TFLT capacitor determines the delay time for both
the open-lamp fault and secondary short-circuit fault.
The MAX8751 charges the TFLT capacitor with a 1µA
current source during an open-lamp fault and charges
the TFLT capacitor with a 126µA current source during
a secondary short-circuit fault. Therefore, the sec-
ondary short-circuit fault delay time is approximately
100 times shorter than that of the open-lamp fault. The
MAX8751 sets the fault latch when the TFLT voltage
reaches 4V. Use the following equations to calculate
the open-lamp fault delay (T
ondary short-circuit fault delay (T
The high-side gate drivers are powered using two boot-
strap circuits. The MAX8751 integrates the bootstrap
diodes so only two 0.1µF bootstrap capacitors are
needed. Connect the capacitors between LX1 and
BST1 and between LX2 and BST2 to complete the
bootstrap circuits.
Careful PC board layout is important to achieve stable
operation. The high-voltage section and the switching
section of the circuit require particular attention. The high-
voltage sections of the layout need to be well separated
from the control circuit. Follow these guidelines for good
PC board layout.
1) Keep the high-current paths short and wide, especial-
24
______________________________________________________________________________________
T
T
OPEN LAMP
SEC SHORT
Setting the Fault Delay Time
_
_
=
=
Bootstrap Capacitors
C
C
TFLT
TFLT
OPEN_LAMP
126
SEC_SHORT
Layout Guidelines
1
µ
A
µ
x V
x V
A
4
4
) and sec-
):
2) Use a star-ground configuration for power and analog
4) Mount the decoupling capacitor from V
5) The current-sense paths for LX_ to GND must be
6) Ensure the feedback connections are short and
7) To the extent possible, high-voltage trace clearance
8) The traces to the capacitive voltage-divider on the
3) Route high-speed switching nodes away from sensi-
ly at the ground terminals. This is essential for stable,
jitter-free operation and high efficiency.
grounds. The power and analog grounds should be
completely isolated—meeting only at the center of the
star. The center should be placed at the analog
ground pin (GND). Using separate copper islands for
these grounds can simplify this task. Quiet analog
ground is used for V
tive analog areas (V
Make all pin-strap control input connections to analog
ground or V
close as possible to the IC with dedicated traces that
are not shared with other signal paths.
made using Kelvin-sense connections to guarantee
the current-limit accuracy. With 8-pin MOSFETs, this
is best done by routing power to the MOSFETs from
the outside using the top copper layer, while connect-
ing GND and LX_ inside (underneath) the 8-pin SO
package.
direct. To the extent possible, IFB, VFB, and ISEC
connections should be far away from the high-voltage
traces and the transformer.
on the transformer’s secondary should be widely sep-
arated. The high-voltage traces should also be sepa-
rated from adjacent ground planes to prevent lossy
capacitive coupling.
transformer’s secondary need to be widely separated
to prevent arcing. Moving these traces to opposite
sides of the board can be beneficial in some cases.
CC
.
CC
CC
, COMP, HF, LF, and TFLT.
, COMP, HF, LF, and TFLT).
CC
to GND as