LM629M-6/NOPB National Semiconductor, LM629M-6/NOPB Datasheet - Page 11

• Manufacturer Part Number: LM629M-6/NOPB
• Description: IC CONTROLLER PREC MOTION 24SOIC
• Manufacturer: National Semiconductor

Specifications of LM629M-6/NOPB

• Applications: DC Motor Controller, Servo
• Number Of Outputs: 1
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Voltage - Load: -
• Other names: *LM629M-6; *LM629M-6/NOPB; LM629M-6

RESET
PORT8
PORT12
DFH
SIP
LPEI
LPES
SBPA
Theory of Operation
LM628 READING AND WRITING OPERATIONS
The host processor writes commands to the LM628 via the
host I/O port when Port Select (PS ) input (Pin 16) is logic
low. The desired command code is applied to the parallel
port line and the Write (WR ) input (Pin 15) is strobed. The
command byte is latched into the LM628 on the rising edge
of the WR input. When writing command bytes it is neces-
sary to first read the status byte and check the state of a flag
called the “busy bit” (Bit 0). If the busy bit is logic high, no
command write may take place. The busy bit is never high
longer than 100 µs, and typically falls within 15 µs to 25 µs.
The host processor reads the LM628 status byte in a similar
manner: by strobing the Read (RD ) input (Pin 13) when PS
(Pin 16) is low; status information remains valid as long as
RD is low.
Writing and reading data to/from the LM628 (as opposed to
writing commands and reading status) are done with PS (Pin
16) logic high. These writes and reads are always an integral
number (from one to seven) of two-byte words, with the first
byte of each word being the more significant. Each byte
requires a write (WR ) or read (RD ) strobe. When transfer-
ring data words (byte-pairs), it is necessary to first read the
status byte and check the state of the busy bit. When the
busy bit is logic low, the user may then sequentially transfer
both bytes comprising a data word, but the busy bit must
again be checked and found to be low before attempting to
Command
Initialize
Initialize
Initialize
Initialize
Interrupt
Interrupt
Interrupt
Interrupt
FIGURE 11. PWM Output Signal Format (Sign output (pin 18) not shown)
Type
(Continued)
Reset LM628
Select 8-Bit Output
Select 12-Bit Output
Define Home
Set Index Position
Interrupt on Error
Stop on Error
Set Breakpoint, Absolute
TABLE 2. LM628 User Command Set
Description
11
transfer the next byte pair (when transferring multiple
words). Data transfers are accomplished via LM628-internal
interrupts (which are not nested); the busy bit informs the
host processor when the LM628 may not be interrupted for
data transfer (or a command byte). If a command is written
when the busy bit is high, the command will be ignored.
The busy bit goes high immediately after writing a command
byte, or reading or writing a second byte of data (See Figure
5 thru Figure 7).
MOTOR OUTPUTS
The LM628 DAC output port can be configured to provide
either a latched eight-bit parallel output or a multiplexed
12-bit output. The 8-bit output can be directly connected to a
flow-through (non-input-latching) D/A converter; the 12-bit
output can be easily demultiplexed using an external 6-bit
latch and an input-latching 12-bit D/A converter. The DAC
output data is offset-binary coded; the 8-bit code for zero is
80 hex and the 12-bit code for zero is 800 hex. Values less
than these cause a negative torque to be applied to the
motor and, conversely, larger values cause positive motor
torque. The LM628, when configured for 12-bit output, pro-
vides signals which control the demultiplexing process. See
for details.
The LM629 provides 8-bit, sign and magnitude PWM output
signals for directly driving switch-mode motor-drive amplifi-
ers. Figure 11 shows the format of the PWM magnitude
output signal.
00921913
Hex
1B
1A
00
05
06
02
03
20
Bytes
Data
0
0
0
0
0
2
2
4
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Note
1
2
2
1
1
1
1
1