HCTL-1101 Avago Technologies US Inc., HCTL-1101 Datasheet
HCTL-1101
Specifications of HCTL-1101
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HCTL-1101 Summary of contents
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... The programmability of all control para- meters provides maximum flexibility and quick design of control systems with a minimum number of components. In addition to the HCTL-1101, the complete control sys- tem consists of a host processor to specify commands, an amplifier, and a motor with an incremental encoder (such as the HEDS-5XXX, -6XXX, -9XXX series) ...
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... The HCTL-1101 is a general purpose motor controller which provides position and velocity control for DC, DC brushless and stepper motors. The internal block dia- gram of the HCTL-1101 is shown in Figure 1. The HCTL- 1101 receives its input commands from a host processor and position feedback from an incremental encoder with quadrature output ...
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Package Dimensions 3 ...
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Figure 1. Internal Block Diagram. Figure 2. Operating Mode Flowchart. 4 ...
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Electrical Specification Parameter Operating Temperature Storage Temperature Supply Voltage Input Voltage Maximum Operating Clock Frequency DC Electrical Characteristics ± 5 -20°C to +85°C DD Parameter Supply Voltage Supply Current Input Leakage Current Input Pull-Up ...
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AC Electrical Characteristics VDD = -200C to +850C; Units + nsec ID # Signal 1 Clock Period (clk) 2 Pulse Width, Clock High 3 Pulse Width, Clock Low 4 Clock Rise and Fall Time 5 ...
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... HCTL-1101 I/O Timing Diagrams Input logic level values are the TTL Logic levels VIL = 0.8 V and VIH = 2.0 V. Output logic levels are VOL = 0.4 V and VOH = 2 ...
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... HCTL-1101 I/O Timing Diagrams There are three different timing configurations which can be used to give the user flexibility to interface the HCTL-1101 to most microprocessors. See the I/O interface section for more details. 8 ...
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... HCTL-1101 I/O Timing Diagrams 9 ...
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... HCTL-1101 I/O Timing Diagrams 10 ...
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... RESET – A hard reset of internal circuitry and a branch to Reset mode. ExtClk 34 37 External Clock V 11, 35 12, 38 Voltage Supply – Both V DD GND 10 11, Circuit Ground 23, 35 SYNC 1 2 Used to synchronize multiple HCTL-1101 sample timers. NC – 17, 39 Not connected. These pins should be left floating. 11 pins must be connected to a 5.0 volt supply. DD ...
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... SYNC signal from the host processor will synchro- nize all controllers. LIMIT Pin This emergency-flag input is used to disable the control modes of the HCTL-1101. A low level on this input pin causes the internal LIMIT flag to be set. If this pin is NOT used, it must be pulled not connected, the ...
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... Section” for more information. Both the Pin and the Flag indicate the status of a trapezoid profile move. When the HCTL-1101 begins a trapezoid move, this flag is set by the controller (a high level appears on the pin), indicating the move is in progress. When the HCTL-1101 finishes the move, this flag is cleared by the controller ...
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... Operations of the HCTL-1101 Registers The HCTL-1101 operation is controlled by a bank bit registers which are user accessible. These reg- isters contain command and configuration information necessary to properly run the controller chip. The 35 user- accessible registers are listed in Tables 1 and 2. The regis- Figure 3. Register Block. ...
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Table 1. Register Reference By Mode 15 ...
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Table 1. (continued). Notes: 1. Consult appropriate section for data format and use. 2. Upper 4 bits are read only. 3. Writing to R0EH (LSB) latches all 24 bits. 4. Reading R14H (LSB) latches data in R12H and R13H. 5. ...
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Table 2. Register Reference Table by Register Number Notes: 1. Consult appropriate section for data format and use. 2. Upper 4 bits are read only. 3. Writing to R0EH (LSB) latches all 24 bits. 4. Reading R14H (LSB) latches data ...
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Table 2. Register Reference Table by Register Number Notes: 1. Consult appropriate section for data format and use. 2. Upper 4 bits are read only. 3. Writing to R0EH (LSB) latches all 24 bits. 4. Reading R14H (LSB) latches data ...
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... Each flag is set and cleared by writ- ing an 8-bit data word to R00H. When writing to R00H, the upper four bits are ignored by the HCTL-1101, bits 0,1,2 specify the flag address, and bit 3 specifies whether to set (bit=1) or clear (bit=0) the addressed flag. ...
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... INIT/IDLE mode. Unipolar mode or Bipolar mode is programmed by setting or clearing flag F2 in the Flag Register R00H. Internally, the HCTL-1101 operates on data of 24, 16 and 8 bit lengths to produce the 8-bit motor command, avail- able externally. Many times the computed motor com- mand will be greater than 8 bits. At this point, the motor command is saturated by the controller ...
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Figure 4. Motor Command Port Output. When any Control mode is being executed, the unadjust- ed internal 2’s-complement motor command is written to R09H. Because of the hardware limit on the linear range (64H to 9CH, ± 100D), the PWM ...
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... R15H and R16H first. When R17H is written to, all three bytes are simultaneously loaded into the Actual Position Register. Note that presetting the Actual Position Registers is only allowed while the HCTL-1101 is in INIT/ IDLE mode. The Actual Position Registers can be simultaneously cleared at any time by writing any value to R13H. 22 ...
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... This rule of thumb must be balanced by the needs of the veloc- ity range to be controlled. Velocities are specified to the HCTL-1101 in terms of quadrature encoder counts per sample time. Hardware Description The Sample Timer consists of a buffer and a decrement counter ...
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... The length of time needed by the HCTL-1101 to do its calculations is given by the Minimum Limits of R0FH (Sample Timer Register) as shown in Table 4. For Position Control Mode, the user should wait for the ...
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... Phase A going high) as shown in Figure 10. The output of the Commutator is available as PHA, PHB, PHC, and PHD. The HCTL-1101’s Commutator acts as the electrical equivalent of the mechanical brushes in a mo- tor. Therefore, the outputs of the Commutator provide only proper phase sequencing for bidirectional opera- tion ...
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Figure 8. Codewheel Index Pulse Alignment. Figure 9. PWM Interface to Brushles DC Motors. 26 Figure 10. Commuter Configurations. ...
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... R1BH), the Offset register (R1CH), the Velocity Timer register (R19H), and the Maximum Advance register (R1FH). Quadrature counts (4x decoding) are always used by the HCTL-1101 as a basis for position, velocity, and accelera- tion control. Ring Register (R18H) The Ring register is defined as 1 electrical cycle of the Com- mutator which corresponds to 1 torque cycle of the mo- tor ...
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The parameters of Ring and Max Advance must be positive numbers (00H to 7FH). Additionally, the following equation must be satisfied: In order to utilize the greatest flexibility of the Commuta- tor, it must be realized that the ...
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... Position Control • Proportional Velocity Control • Trapezoidal Profile Control • Integral Velocity Control The HCTL-1101 switches from one mode to another as a result of one of the following three mechanisms: 1. The user writes to the Program Counter. 2. The user sets/clears flags F0, F3 writing to the Flag register (R00H) ...
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... Previously sampled data stored in the digital filter is cleared this point that the user should pre-program all the necessary registers needed to execute the desired control mode. The HCTL-1101 stays in this mode (idling) until a new mode command is given. Align Executed by: • Writing 02H to R05H The Align mode is executed only when using the com- mutator feature of the HCTL-1101 ...
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... At this point the Commutator is enabled and com- mutation is closed loop. The HCTL-1101 then automatically switches from the Align mode to Position Control mode. Control Modes Control flags F0, F3, and F5 in the Flag register (R00H) de- ter-mine which control mode is executed ...
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... HCTL-1101’s Sample Timer regis- ter). Because the Command Velocity registers (R24H and R23H) are internally interpreted by the HCTL-1101 as 12 bits of integer and 4 bits of fraction, the host processor must multiply the desired command velocity (in quadrature counts/sample time before programming it into ...
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... Figure 13 shows the capability of this control algorithm. The user can change velocity and acceleration any time to continuously profile velocity in time. Once the speci- fied velocity is reached, the HCTL-1101 will maintain that 33 velocity until a new command is specified. Changes be- tween actual velocities occur at the presently specified linear acceleration. The command velocity is an 8-bit two’ ...
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... HCTL-1101’s Sample Timer regis- ter). Because the Command Acceleration registers (R27H and R26H) are internally interpreted by the HCTL-1101 as 8 bits of integer and 8 bits of fraction, the host processor must multiply the desired command acceleration (in quadra- ture counts/[sample time]2) by 256 before programming it into the HCTL-1101’ ...
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Trapezoid Profile Mode Flags: F0 Set to begin move F3 Cleared F5 Cleared Registers Used: Register Function R00H R00D Flag Register velocity R07H R07D Status Register R12H R18D Read Actual Position MSB R13H R19D Read Actual Position R14H R20D Read ...
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... Position Control mode with the final position of the trapezoidal move as the com- mand position. When the HCTL-1101 clears flag F0 it does NOT indicate that the motor and encoder are at the final position NOR that the motor and encoder have stopped. The flag indi- cates that the command profile has finished. The motor and encoder’ ...
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... Applications of the HCTL-1101 Interfacing the HCTL-1101 to Host Processors The HCTL-1101 looks to the host microprocessor like a bank of 8-bit registers to which the host processor can read and write (i.e., the host processor treats the HCTL- 1101 like RAM). The data in these registers controls the operation of the HCTL-1101 ...
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... This allows direct inter- facing to a DAC. Figure 16 shows a typical DAC interface to the HCTL-1101. An inexpensive DAC, such as MC1408 or equivalent, has its digital inputs directly connected to the Motor Command port. The DAC pro-duces an output current which is converted to a voltage by an operational amplifier ...
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... Figure 15. I/O Port Block Diagram (LSB HCTL-1101 (MSB Figure 16. Linear Amplifier Interface. UDN2954W µF MOTOR SIGN PULSE DC MOTOR Figure 17. H-Bridge Amplifier Interface ref+ GND (LSB ref 2 MC1408 (MSB COMP – X– OUT LF356 3 X+ ...
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... Additional Information from Avago Technologies Application notes and Application briefs regarding the HCTL-1101 are from the Avago Technologies Motion Con- trol Factory. Please contact your local Avago sales representative for more information. For product information and a complete list of distributors, please go to our web site: Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright © ...