NCP1603D100R2G ON Semiconductor, NCP1603D100R2G Datasheet

IC CTLR PFC/PWM COMBO 16-SOIC

NCP1603D100R2G

Manufacturer Part Number
NCP1603D100R2G
Description
IC CTLR PFC/PWM COMBO 16-SOIC
Manufacturer
ON Semiconductor
Datasheet

Specifications of NCP1603D100R2G

Mode
Critical Conduction (CRM), Discontinuous Conduction (DCM)
Frequency - Switching
58kHz
Current - Startup
17µA
Voltage - Supply
9 V ~ 18 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Switching Frequency
405 KHz
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
NCP1603
PFC/PWM Combo Controller
with Integrated High
Voltage Startup and Standby
Capability
Modulation (PWM) combo controller. It offers extremely low
no−load standby power consumption that is suitable for the
low−power consumer markets. The key features of the device are
listed below.
Features
PFC Features
PWM Features
Applications
*For additional information on our Pb−Free strategy and soldering details, please
© Semiconductor Components Industries, LLC, 2009
August, 2009 − Rev. 9
download the ON Semiconductor Soldering and Mounting Techniques Reference
Manual, SOLDERRM/D.
The NCP1603 is a Power Factor Correction (PFC) and Pulse Width
(DCM and CRM)
(8% of Nominal Output Level)
Capability During Standby Condition
Extremely Low No−Load Standby Power Consumption
Coupled Auxiliary Transformer Winding
This is a Pb−Free Device*
Near−Unity Power Factor in Discontinuous and Critical Mode
Voltage−Mode Operation
Low Startup and Shutdown Current Consumption
Programmable Switching Frequency for DCM
Synchronization Capability
Overvoltage Protection (107% of Nominal Output Level)
Undervoltage Protection or Shutdown
Programmable Overcurrent Protection
Thermal Shutdown with Hysteresis (95/140°C)
Undervoltage Lockout with Hysteresis (9.0/10.5 V)
Integrated Lossless High Voltage Startup Current Source
100 kHz PWM Current−Mode Operation with Skipping Cycle
PFC Bias Voltage is Disabled in Standby Condition to Achieve
Fault Protection Implemented by a Timer and Independent of Badly
Primary Overcurrent Protection and Latched Overvoltage Protection
Internal 2.5 ms Soft−Start
"
Latched Thermal Shutdown with Hysteresis (140/165°C)
Undervoltage Lockout with Hysteresis (5.6/7.7/12.6 V)
Notebook Adapters
TV/Monitors
6.4% Frequency Jittering for Improved EMI Performance
1
†For information on tape and reel specifications,
NCP1603D100R2G
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
1
Device
GND2
GND1
V
Out1
V
CS2
FB2
Osc
CC1
ORDERING INFORMATION
aux
A
WL = Wafer Lot
Y
WW = Work Week
G
CASE 751B
D SUFFIX
PIN CONNECTIONS
http://onsemi.com
2
3
4
5
6
7
8
1
SO−16
= Assembly Location
= Year
= Pb−Free Package
(Top View)
(Pb−Free)
Package
SO−16
Publication Order Number:
16
1
1603D100G
16
15
14
13 Out2
12
10
2500 Tape & Reel
11
MARKING
DIAGRAM
9
AWLYWW
Shipping
HV
NC
V
Ramp
CS1
V
FB1
CC2
control
NCP1603/D

Related parts for NCP1603D100R2G

NCP1603D100R2G Summary of contents

Page 1

... GND2 4 Osc 5 GND1 6 Out1 CC1 (Top View) ORDERING INFORMATION Device Package NCP1603D100R2G SO−16 (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. 1 MARKING DIAGRAM 16 1603D100G AWLYWW 1 HV ...

Page 2

EMI AC Filter Input Not Synchronized and V EMI AC Filter Input Synchronized and Output OVP Latch Implemented NCP1603 OVP Latch Implemented CC OVP NCP1603 Figure 1. Typical Application Circuits http://onsemi.com 2 + Output Voltage − OVP Output Voltage + ...

Page 3

V FB2 2 FB2 5V Standby 20k 10V − + 55k 0.75V 25k + 2 Gnd2 4 Softstart − 1V max 1 0 100 kHz 5ms Jittering 0~2.3V ramp 18k V CS2 200ns 3 CS2 LEB 10V ...

Page 4

PIN FUNCTION DESCRIPTION Pin Symbol Function 1 V Auxiliary Supply aux 2 FB2 PWM Feedback 3 CS2 PWM Current Sense 4 GND2 PWM Ground 5 Osc PFC Oscillator 6 GND1 PFC Ground 7 Out1 PFC Drive Output 8 V PFC ...

Page 5

MAXIMUM RATINGS Rating V Pin (Pin 1) aux Maximum Voltage Range Maximum Continuous Current FB2 and CS2 Pin (Pins 2−3) Maximum Voltage Range Maximum Current Ramp, CS1 FB1, and Osc Pins (Pins 5, 9−12) control Maximum Voltage Range ...

Page 6

ELECTRICAL CHARACTERISTICS 100 nF, Ramp = 330 pF, Osc = 220 pF unless otherwise specified). CC1 control Characteristic (PWM Section) PWM OSCILLATOR Oscillation Frequency (T = 25_C) (Note 3) J ...

Page 7

ELECTRICAL CHARACTERISTICS 100 nF, Ramp = 330 pF, Osc = 220 pF unless otherwise specified). CC1 control Characteristic (PFC Section) PWM SUPPLY SECTION Supply Voltage Startup Threshold, V Increasing CC2 ...

Page 8

ELECTRICAL CHARACTERISTICS CC2 CC1 control Characteristic (PFC Section) PFC CURRENT SENSE Current Sense Pin Offset Voltage (I = 100 mA) S Overcurrent Protection Level Current Sense Pin ...

Page 9

T , JUNCTION TEMPERATURE (°C) J Figure 3. PWM Section Oscillator Frequency vs. Temperature CS2 Pin ...

Page 10

T , JUNCTION TEMPERATURE (°C) J Figure 9. PWM Section Lead Edge Blanking vs. Temperature 500 450 400 350 300 250 200 150 100 50 0 −50 ...

Page 11

T , JUNCTION TEMPERATURE (°C) J Figure 15. FB2 Pin Sinking Capability vs. Temperature Sinking ...

Page 12

T , JUNCTION TEMPERATURE (°C) J Figure 21. PWM Section Supply Voltage Thresholds vs. Temperature −50 ...

Page 13

T , JUNCTION TEMPERATURE (°C) J Figure 27. PFC Section Reference Current vs. Temperature 100 ...

Page 14

T , JUNCTION TEMPERATURE (°C) J Figure 33. PFC Section Overvoltage Protection Threshold vs. Temperature 120 100 −40°C J ...

Page 15

T , JUNCTION TEMPERATURE (°C) J Figure 39. PFC Section Zero Current Sense Resistance vs. Temperature 12 11.5 11 10.5 10 9.5 9 8.5 8 −50 −25 ...

Page 16

EMI C V filter Filter CS1 Introduction The NCP1603 is a PWM/PFC combo controller for two−stages PFC low−power application. application circuit is listed in Figure 45. The first−stage PFC boost ...

Page 17

The recommended biasing schematic of the controller is in Figure 47 while a typical completed application schematic can be referred to Figure 45. These two dies have their own individual supply voltages at Pin 8 and Pin 14. The grounds ...

Page 18

The UVLO start thresholds of V CC1 typical) and the maximum allowable limit the other hand, the V is enabled when V aux (7.7 V typical). Hence, there are two possible operating regions in Figure 49. ...

Page 19

Frequency Jittering PWM Section Oscillator Frequency 5 ms Figure 51. Frequency Jittering of PWM Oscillator Frequency jittering is a method used to soften the EMI signature by spreading the energy in the vicinity of the main switching component. The PWM ...

Page 20

Startup current source charging the V 12 CC2 7 Figure 53 illustrates the timing diagram of V second−stage drain current I in fault condition. The V D drops because output voltage collapses. ...

Page 21

Figure 54 illustrates the standby detection circuitry and its timing diagram. When standby condition happens (i.e., V < 0.75 V), the controller will wait for a typical 125 ms FB2 to ensure that the output power remains low for a ...

Page 22

DCM needs higher peak inductor current comparing to CRM in the same averaged input current. Hence, CRM is generally preferred at around the sinusoidal peak for lower the maximum current stress but DCM is also preferred at the non−peak region ...

Page 23

V ESD zener diode. The 3.9 V maximum limit of this V indirectly limits the maximum on time. ton The V processing circuit generates V control control voltage V and time information of zero control inductor current. The ...

Page 24

Feedback in PFC Section The output voltage of the PFC circuit (i.e., bulk voltage sensed as a feedback current I bulk FB1 pin (Pin 9) of NCP1603. The FB1 pin voltage V typically smaller than 5.0 V ...

Page 25

It is obvious that the I is not always zero. In order L(ZCD) to make it reasonably close to zero, the setting are crucial. CS1 > S(ZCD) Operating ZCD point R = ...

Page 26

The PFC section is designed to operate in either DCM or CRM. In order to keep the operation in DCM and CRM only, the Drive Output cannot turn on as long as there is some inductor current flowing through the ...

Page 27

Osc pin and a capacitor is added to remove some possible noise As a result, the current in Figure 73 may not necessarily passes through the bulk capacitor for fewer ripple current there. Out2 OSC Figure 72. Synchronization Configuration ...

Page 28

In order to prevent wrongly triggering the latch protection function generaly recommended to put a pF−order decoupling ceramic capacitor across the CS2 pin to remove possible high−frequency noise there. To set the V overvoltage protection, the circuit is ...

Page 29

PFC Toggling The variation of the duty ratio in the PWM stage between the PFC−on or PFC−off can be very large. When the NCP1603 circuit is operating at some conditions between PFC on and off boundary, the duty ratio variation ...

Page 30

... SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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