LTC3588EDD-2#TRPBF Linear Technology, LTC3588EDD-2#TRPBF Datasheet - Page 9

• Manufacturer Part Number: LTC3588EDD-2#TRPBF
• Description: IC ENERGY HARVESTING PSU 10DFN
• Manufacturer: Linear Technology

Specifications of LTC3588EDD-2#TRPBF

• Applications: Energy Harvesting
• Current - Supply: 950nA
• Voltage - Supply: 2.7 V ~ 20 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

OPERATION
When the sleep comparator signals that the output has
reached the sleep threshold the buck converter may be
in the middle of a cycle with current still fl owing through
the inductor. Normally both synchronous switches would
turn off and the current in the inductor would freewheel
to zero through the NMOS body diode. The LTC3588-2
keeps the NMOS switch on during this time to prevent the
conduction loss that would occur in the diode if the NMOS
were off. If the PMOS is on when the sleep comparator
trips the NMOS will turn on immediately in order to ramp
down the current. If the NMOS is on it will be kept on until
the current reaches zero.
Though the quiescent current when the buck is switching
is much greater than the sleep quiescent current, it is still
a small percentage of the average inductor current which
results in high effi ciency over most load conditions. The
buck operates only when suffi cient energy has been ac-
cumulated in the input capacitor and the length of time the
converter needs to transfer energy to the output is much
less than the time it takes to accumulate energy. Thus, the
buck operating quiescent current is averaged over a long
period of time so that the total average quiescent current
is low. This feature accommodates sources that harvest
small amounts of ambient energy.
Four selectable voltages are available by tying the output
select bits, D0 and D1, to GND or V
D0/D1 codes and their corresponding output voltages.
Table 1. Output Voltage Selection
The internal feedback network draws a small amount of
current from V
Power Good Comparator
A power good comparator produces a logic high referenced
to V
reaches the sleep threshold of the programmed V
signaling that the output is in regulation. The PGOOD pin
will remain high until V
D1
0
0
1
1
OUT
on the PGOOD pin the fi rst time the converter
D0
0
1
0
1
OUT
as listed in Table 1.
3.45V
V
4.1V
4.5V
5.0V
OUT
OUT
V
falls to 92% of the desired
OUT
IN2
QUIESCENT CURRENT (I
. Table 1 shows the four
101nA
111nA
125nA
86nA
VOUT
OUT
)
,
regulation voltage. Several sleep cycles may occur during
this time. Additionally, if PGOOD is high and V
the UVLO falling threshold, PGOOD will remain high until
V
allows output energy to be used even if the input is lost.
Figure 2 shows the behavior for V
load. At t = 2s V
charged by the quiescent current of the LTC3588-2 and
through servicing V
leakage current. V
remains high until V
regulation point. The PGOOD pin is designed to drive a
microprocessor or other chip I/O and is not intended to
drive higher current loads such as an LED.
The D0/D1 inputs can be switched while in regulation as
shown in Figure 3. If V
a PGOOD falling threshold above the old V
OUT
Figure 2. PGOOD Operation During Transition to UVLO
Figure 3. PGOOD Operation During D0/D1 Transition
falls to 92% of the desired regulation point. This
20
18
16
14
12
10
6
5
4
3
2
1
0
8
6
4
2
0
0
0
C
D1=D0=0
C
C
I
OUT
LOAD
V
IN
OUT
IN
2
IN
= 10μF ,
= 100μF , I
= 47μF ,
= 10μA
2
IN
4
becomes high impedance and is dis-
OUT
OUT
OUT
crosses UVLO falling but PGOOD
6
LOAD
4
D1=D0=1
decreases to 92% of the desired
which is discharged by its own
8
TIME (ms)
TIME (sec)
is programmed to a voltage with
= 100mA
10
6
V
IN
12
PGOOD = LOGIC 1
PGOOD
= UVLO FALLING
8
14
OUT
LTC3588-2
D1=D0=0
16
V
10
OUT
V
OUT
18
35882 F03
= 5V and a 10μA
35882 F02
OUT
20
12
IN
, PGOOD will
falls below
35882f
9