LTC2953IDD-2#PBF Linear Technology, LTC2953IDD-2#PBF Datasheet - Page 15

• Manufacturer Part Number: LTC2953IDD-2#PBF
• Description: IC PB ON/OFF CONTROLLER 12DFN
• Manufacturer: Linear Technology

Specifications of LTC2953IDD-2#PBF

• Applications: Push Button, On/Off Controller
• Voltage - Supply: 2.7 V ~ 27 V
• Current - Supply: 14µA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 12-DFN
• Ic Function: Push Button On/Off Controller With Voltage Monitoring
• Supply Voltage Range: 2.7V To 27V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: DFN
• No. Of Pins: 12
• Svhc: No
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Input: -

APPLICATIONS INFORMATION
V
Which Input Initiated Power Down: ⎯ P ⎯ B or UVLO?
The circuit in Figure 14 determines whether a power
down was initiated by a user pressing the push button
or by a battery drooping too low. If both ⎯ I ⎯ N ⎯ T and ⎯ P ⎯ F ⎯ O
outputs are low, then a low battery condition initiated a
power down.
PFI and UVLO Thresholds
The circuit depicted in Figure 14 uses one resistive divider
network for both power fail and low battery comparators.
The power fail comparator trips at a higher battery voltage
than the low battery comparator, thus providing a battery
warning before a power down sequence is initiated. Due
V
TH
+
TH
= 6.04V
2150k
= 5.4V
23.2k
196k
8.4V
R14
R13
R12
Figure 14. Dual Function Battery Comparators
0.5V
0.5V
UVLO
PFI
LTC2953-1
COMPARATOR
POWER FAIL
COMPARATOR
–
+
–
+
UVLO
50mV
4mV
V
IN
AND DELAY
DEBOUNCE
DEBOUNCE
PFO
2953 F14
INT
EN
to the low offset architecture of the comparators, the
UVLO and ⎯ P ⎯ F ⎯ I thresholds can be set to as close as ±5mV
apart. The trip thresholds of the circuit of Figure 14 are
6.04V and 5.40V for the power fail and low battery (UVLO)
comparators, respectively.
Push Button Lockout
The LTC2953 provides a push button lock out feature that
prevents a user from turning on a system with a dead
battery. The push button input is ignored when the UVLO
input voltage is less than the falling threshold (0.5V). See
Figure 15B.
UVLO
UVLO
INT
INT
EN
Figure 15A. Supply Glitch Generates μP Interrupt
Figure 15B. Low Supply Initiates System
Power Down and Locks Out Enable
0.5V
0.5V
t
t
DB, OFF
DB, OFF
SUPPLY
GLITCH
t
PD, Min
LOW SUPPLY CONDITION
0.55V
t
+ t
INT, Min
PDT
LTC2953
LOW SUPPLY
LOCKS OUT
ENABLE
15
2953 F15a
2953 F15b
2953f