MAX5060ETI+T Maxim Integrated Products, MAX5060ETI+T Datasheet - Page 26

IC CNTRLR DC-DC 28-TQFN

MAX5060ETI+T

Manufacturer Part Number
MAX5060ETI+T
Description
IC CNTRLR DC-DC 28-TQFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX5060ETI+T

Pwm Type
Current Mode
Number Of Outputs
1
Frequency - Max
1.5MHz
Duty Cycle
90%
Voltage - Supply
4.75 V ~ 28 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
-40°C ~ 85°C
Package / Case
28-TQFN Exposed Pad
Frequency-max
1.5MHz
Output Voltage
0.6 V to 5.5 V
Output Current
30 A
Input Voltage
4.75 V to 5.5 V, 7 V to 28 V
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
0.6V to 5.5V Output, Parallelable,
Average-Current-Mode DC-DC Controllers
Keep the maximum output voltage deviation less than
or equal to the adaptive voltage-positioning window
( V
put capacitance discharge and the ESR drop. Use the
following equations to calculate the required ESR and
capacitance value:
where I
response time of the controller. Controller response
time depends on the control-loop bandwidth.
In addition to the average current limit, the
MAX5060/MAX5061 also have hiccup current limit. The
hiccup current limit is set to 10% below the average
current limit to ensure that the circuit goes in hiccup
mode during continuous output short circuit.
Connecting a resistor from LIM to ground increases the
hiccup current limit, while shorting LIM to ground dis-
ables the hiccup current-limit circuit.
The average-current-mode control technique of the
MAX5060/MAX5061 accurately limits the maximum out-
put current. The MAX5060/MAX5061 sense the voltage
across the sense resistor and limit the peak inductor
current (I
when the current-sense voltage reaches 25.5mV (min).
Use the following equation to calculate the maximum
current-sense resistor value:
where PD
tors. Select a 5% lower value of R
any parasitics associated with the PC board. Also,
select a non-inductive resistor with the appropriate
power rating.
The hiccup current-limit value is always 10% lower than
the average current-limit threshold, when LIM is left
unconnected. Connect a resistor from LIM to SGND to
increase the hiccup current-limit value from 90% to
26
OUT
______________________________________________________________________________________
). Assume 50% contribution each from the out-
STEP
L-PK
R
is the power dissipation in the sense resis-
is the load step and t
) accordingly. The ON cycle terminates
ESR
C
OUT
OUT
R
PD
S
R
I
STEP
0 0255
I
.
I
OUT
0 75
STEP
V
.
ESR
R
t
V
Average Current Limit
RESPONSE
S
Q
Hiccup Current Limit
10
S
3
to compensate for
RESPONSE
Current Limit
is the
100% of the average current-limit value. The average
current-limit architecture accurately limits the average
output current to its current-limit threshold. If the hiccup
current limit is programmed to be equal or above the
average current-limit value, the output current will not
reach the point where the hiccup current limit can trig-
ger. Program the hiccup current limit at least 5% below
the average current limit to ensure that the hiccup cur-
rent-limit circuit triggers during overload. See the
Hiccup Current Limit vs. R
Operating Characteristics.
The MAX5060 limits the reverse current in case V
higher than the preset output voltage. Calculate the
maximum reverse current based on V
current-limit threshold and the current-sense resistor.
where I
converter and V
The main control loop consists of an inner current loop
and an outer voltage loop. The MAX5060/MAX5061 use
an average current-mode control scheme to regulate
the output voltage (Figure 5). I
age current loop. The VEA output provides the control-
ling voltage for this current source. The inner current
loop absorbs the inductor pole reducing the order of
the outer voltage loop to that of a single-pole system.
A resistive feedback network around the VEA provides
the best possible response, since there are no capaci-
tors to charge and discharge during large-signal excur-
sions. R
following equation to calculate the value of R
where G
is the value of the sense resistor.
When designing the current-control loop ensure that
the inductor downslope (when it becomes an upslope
at the CEA output) does not exceed the ramp slope.
This is a necessary condition to avoid sub-harmonic
oscillations similar to those in peak current-mode con-
trol with insufficient slope compensation.
REVERSE
C
F
is the current-loop transconductance and R
and R
Reverse Current Limit (MAX5060)
CLR
is the total reverse current sink into the
IN
R
G
I
REVERSE
F
C
determine the VEA gain. Use the
= 2.3mV (typ).
G
. 0 0289
I
OUT
C
R
S
EXT
V
PHASE
V
R
CLR
OUT
R
graph in the Typical
S
IN
Compensation
CLR
is the inner aver-
, the reverse-
F
:
BUS
is
S

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