LP2996MR/NOPB National Semiconductor, LP2996MR/NOPB Datasheet - Page 9

• Manufacturer Part Number: LP2996MR/NOPB
• Description: IC DDR TERMINATION REG 8PSOP
• Manufacturer: National Semiconductor

Specifications of LP2996MR/NOPB

• Applications: Converter, DDR
• Voltage - Input: 2.2 ~ 5.5 V
• Number Of Outputs: 1
• Operating Temperature: 0°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-PSOP
• Polarity: Positive
• Input Voltage Max: 5.5 V
• Output Voltage: 1.159 V, 1.259 V, 1.359 V
• Output Type: Fixed
• Output Current: 1.5 A
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Reference Voltage: 1.358 V
• For Use With: LP2996MREVAL - BOARD EVALUATION LP2996MR
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Output: -
• Lead Free Status / Rohs Status: Details
• Other names: *LP2996MR; *LP2996MR/NOPB; LP2996MR

should be sized large enough to prevent an excessive voltage
drop. Despite the fact that the LP2996 is designed to handle
large transient output currents it is not capable of handling
these for long durations, under all conditions. The reason for
this is the standard packages are not able to thermally dissi-
pate the heat as a result of the internal power loss. If large
currents are required for longer durations, then care should
be taken to ensure that the maximum junction temperature is
not exceeded. Proper thermal derating should always be
used (please refer to the Thermal Dissipation section). If the
junction temperature exceeds the thermal shutdown point
than V
trip-point.
Component Selections
INPUT CAPACITOR
The LP2996 does not require a capacitor for input stability,
but it is recommended for improved performance during large
load transients to prevent the input rail from dropping. The
input capacitor should be located as close as possible to the
PVIN pin. Several recommendations exist dependent on the
application required. A typical value recommended for AL
electrolytic capacitors is 50 µF. Ceramic capacitors can also
be used, a value in the range of 10 µF with X5R or better would
be an ideal choice. The input capacitance can be reduced if
the LP2996 is placed close to the bulk capacitance from the
output of the 2.5V DC-DC converter. If the two supply rails
(AVIN and PVIN) are separated then the 47uF capacitor
should be placed as close to possible to the PVIN rail. An
additional 0.1uF ceramic capacitor can be placed on the AVIN
rail to prevent excessive noise from coupling into the device.
OUTPUT CAPACITOR
The LP2996 has been designed to be insensitive of output
capacitor size or ESR (Equivalent Series Resistance). This
allows the flexibility to use any capacitor desired. The choice
for output capacitor will be determined solely on the applica-
tion and the requirements for load transient response of V
As a general recommendation the output capacitor should be
sized above 100 µF with a low ESR for SSTL applications with
DDR-SDRAM. The value of ESR should be determined by the
maximum current spikes expected and the extent at which the
output voltage is allowed to droop. Several capacitor options
are available on the market and a few of these are highlighted
below:
AL - It should be noted that many aluminum electrolytics only
specify impedance at a frequency of 120 Hz, which indicates
they have poor high frequency performance. Only aluminum
electrolytics that have an impedance specified at a higher fre-
quency (between 20 kHz and 100 kHz) should be used for the
LP2996. To improve the ESR several AL electrolytics can be
combined in parallel for an overall reduction. An important
note to be aware of is the extent at which the ESR will change
over temperature. Aluminum electrolytic capacitors can have
their ESR rapidly increase at cold temperatures.
Ceramic - Ceramic capacitors typically have a low capaci-
tance, in the range of 10 to 100 µF range, but they have
excellent AC performance for bypassing noise because of
very low ESR (typically less than 10 mΩ). However, some
dielectric types do not have good capacitance characteristics
as a function of voltage and temperature. Because of the typ-
ically low value of capacitance it is recommended to use
ceramic capacitors in parallel with another capacitor such as
an aluminum electrolytic. A dielectric of X5R or better is rec-
ommended for all ceramic capacitors.
TT
will tri-state until the part returns below the hysteretic
TT
.
9
Hybrid - Several hybrid capacitors such as OS-CON and SP
are available from several manufacturers. These offer a large
capacitance while maintaining a low ESR. These are the best
solution when size and performance are critical, although
their cost is typically higher than any other capacitor.
Thermal Dissipation
Since the LP2996 is a linear regulator any current flow from
V
To prevent damaging the part from exceeding the maximum
allowable junction temperature, care should be taken to der-
ate the part dependent on the maximum expected ambient
temperature and power dissipation. The maximum allowable
internal temperature rise (T
maximum ambient temperature (T
the maximum allowable junction temperature (T
From this equation, the maximum power dissipation (P
of the part can be calculated:
The θ
the package used; the thickness of copper; the number of vias
and the airflow. For instance, the θ
with the package mounted to a standard 8x4 2-layer board
with 1oz. copper, no airflow, and 0.5W dissipation at room
temperature. This value can be reduced to 151.2°C/W by
changing to a 3x4 board with 2 oz. copper that is the JEDEC
standard.
the two boards mentioned.
Additional improvements can be made by the judicious use of
vias to connect the part and dissipate heat to an internal
ground plane. Using larger traces and more copper on the top
side of the board can also help. With careful layout it is pos-
sible to reduce the θ
in
Layout is also extremely critical to maximize the output cur-
rent with the LLP package. By simply placing vias under the
DAP the θ
LLP thermal data when placed on a 4-layer JEDEC board with
copper thickness of 0.5/1/1/0.5 oz. The number of vias, with
a pitch of 1.27 mm, has been increased to the maximum of 4
TT
Figure 2
will result in internal power dissipation generating heat.
JA
of the LP2996 will be dependent on several variables:
Figure 2
JA
can be lowered significantly.
FIGURE 2. θ
T
shows how the θ
JA
Rmax
P
Dmax
further than the nominal values shown
= T
JA
= T
Rmax
vs Airflow (SO-8)
Jmax
Rmax
) can be calculated given the
− T
Amax
JA
/ θ
JA
Amax
of the SO-8 is 163°C/W
JA
) of the application and
varies with airflow for
Figure 3
Jmax
www.national.com
20057507
shows the
).
Dmax
)