LM20146MH/NOPB National Semiconductor, LM20146MH/NOPB Datasheet - Page 4

IC REG SYNC BUCK 6A ADJ 16TSSOP

LM20146MH/NOPB

Manufacturer Part Number
LM20146MH/NOPB
Description
IC REG SYNC BUCK 6A ADJ 16TSSOP
Manufacturer
National Semiconductor
Series
PowerWise®r
Type
Step-Down (Buck)r
Datasheet

Specifications of LM20146MH/NOPB

Design Resources
LM20146 Design Spreadsheet
Internal Switch(s)
Yes
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
0.8 ~ 5 V
Current - Output
6A
Frequency - Switching
250kHz ~ 750kHz
Voltage - Input
2.95 ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP Exposed Pad, 16-eTSSOP, 16-HTSSOP
Power - Output
2.6W
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LM20146MH
www.national.com
Enable
Thermal Shutdown
Thermal Resistance
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2: The maximum allowable power dissipation is a function of the maximum junction temperature, T
and the ambient temperature, T
maximum power dissipations of 2.6W is determined using T
characteristics table is measured with the part surface mounted to a 2" x 2" FR4 4 layer board. See Figure 10 for more detailed θ
Note 3: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor to each pin.
Typical Performance Characteristics
SPM6530T-1R0M120), V
waveforms, and T
Symbol
V
T
V
SD_HYS
EN_HYS
T
IH_EN
θ
SD
JA
High-Side FET Resistance vs. Temperature (T
Efficiency vs. Load Current (V
Parameter
EN Pin turn-on Threshold
EN Pin Hysteresis
Thermal Shutdown
Thermal Shutdown Hysteresis
Junction to Ambient
J
= 25°C for all others.
IN
A
. The maximum allowable power dissipation at any ambient temperature is calculated using: P
= 5V, V
OUT
= 1.2V, R
IN
= 5V)
A
LOAD
= 25°C, θ
30053865
30053861
= 1.2Ω, f
J
)
JA
= 25°C/W, and T
SW
Conditions
V
(Note 2)
4
Unless otherwise specified: C
EN
= 500 kHz, T
Rising
Low-Side FET Resistance vs. Temperature (T
J_MAX
Efficiency vs. Load Current (V
= 125°C. The θ
A
= 25°C for efficiency curves, loop gain plots and
J_MAX
, the junctions-to-ambient thermal resistance, θ
JA
specification of 25°C/W listed in the electrical
IN
= C
OUT
1.08
Min
D_MAX
= 100µF, L = 1.0µH (TDK
JA
information.
= (T
IN
1.18
Typ
= 3.3V)
160
66
10
25
J_MAX
30053866
30053864
– T
Max
1.28
A
)/θ
J
)
JA
. The
°C/W
Unit
mV
°C
°C
V
JA
,

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