MAX1714AEEP Maxim Integrated Products, MAX1714AEEP Datasheet - Page 21

• Manufacturer Part Number: MAX1714AEEP
• Description: IC CTRLR HS STEPDOWN 20-QSOP
• Manufacturer: Maxim Integrated Products
• Type: Step-Down (Buck)r

Specifications of MAX1714AEEP

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 2.5V, 3.3V, Adj
• Current - Output: 8A
• Frequency - Switching: 600kHz
• Voltage - Input: 2 ~ 28 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-QSOP
• Power - Output: 727mW
• Output Voltage: 1 V to 5.5 V
• Output Current: 3000 mA
• Mounting Style: SMD/SMT
• Switching Frequency: 600 KHz
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Synchronous Pin: No
• Topology: Buck
• Case: SSOP20
• Dc: 04+
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Figure 9. Setting V
• LX and PGND connections to Q2 for current limiting
• When trade-offs in trace lengths must be made, it’s
• Ensure that the OUT connection to C
• Route high-speed switching nodes (BST, LX, DH, and
• Make all pin-strap control input connections (SKIP,
where a single milliohm of excess trace resistance
causes a measurable efficiency penalty.
must be made using Kelvin sense connections to
guarantee the current-limit accuracy. With SO-8
MOSFETs, this is best done by routing power to the
MOSFETs from outside using the top copper layer,
while tying in PGND and LX inside (underneath) the
SO-8 package.
preferable to allow the inductor charging path to be
made longer than the discharge path. For example,
it’s better to allow some extra distance between the
input capacitors and the high-side MOSFET than to
allow distance between the inductor and the low-
side MOSFET or between the inductor and the out-
put filter capacitor.
direct. However, in some cases it may be desirable to
deliberately introduce some trace length between the
OUT inductor node and the output filter capacitor (see
the All-Ceramic-Capacitor Application section).
DL) away from sensitive analog areas (REF, FB).
ILIM, etc.) to AGND or V
MAX1714
(GND)
(GND)
PGND
AGND
OUT
DH
DL
FB
OUT
______________________________________________________________________________________
with a Resistor-Divider
V
BATT
CC
rather than PGND or V
( ) ARE FOR THE MAX1714B ONLY.
High-Speed Step-Down Controller
R1
R2
OUT
is short and
V
OUT
DD
.
for Notebook Computers
1) Place the power components first, with ground termi-
2) Mount the controller IC adjacent to MOSFET Q2,
3) Group the gate-drive components (BST diode and
4) Make the DC-DC controller ground connections as
5) Connect the output power planes (V
nals adjacent (Q2 source, CIN-, COUT-, D1 anode). If
possible, make all these connections on the top layer
with wide, copper-filled areas.
preferably on the back side opposite Q2 in order to
keep LX, PGND, and the DL gate-drive lines short and
wide. The DL gate trace must be short and wide,
measuring 10 to 20 squares (50 to 100 mils wide if the
MOSFET is 1 inch from the controller IC).
capacitor, V
controller IC.
shown in Figure 11. This diagram can be viewed as
having three separate ground planes: output ground,
where all the high-power components go; the PGND
plane, where the PGND pin and V
tor go; and an analog AGND plane, where sensitive
analog components go. The analog ground plane and
PGND plane must meet only at a single point directly
beneath the IC. For the MAX1714B, this point should
be the GND pin. These two planes are then connect-
ed to the high-power output ground with a short con-
nection from V
low-side MOSFET, Q2 (the middle of the star ground).
This point must also be very close to the output
capacitor ground terminal.
ground planes) directly to the output filter capacitor
positive and negative terminals with multiple vias.
Place the entire DC-DC converter circuit as close to
the CPU as is practical.
DD
DD
bypass capacitor) together near the
cap/PGND to the source of the
Layout Procedure
DD
CORE
bypass capaci-
and system
21