LTC1149CN-5 Linear Technology, LTC1149CN-5 Datasheet - Page 14

• Manufacturer Part Number: LTC1149CN-5
• Description: IC SW REG STEP-DOWN 5V 16-DIP
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LTC1149CN-5

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 5V
• Current - Output: 50mA
• Frequency - Switching: 250kHz
• Voltage - Input: 0 ~ 48 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 16-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -

APPLICATIO S I FOR ATIO
LTC1149
LTC1149-3.3/LTC1149-5
25mV minimum current comparator threshold. This tech-
nique is also useful for eliminating audible noise from
certain types of inductors in high current (I
applications when they are lightly loaded.
An external offset is put in series with the SENSE
subtract from the built-in 25mV offset. An example of this
technique is shown in Figure 6. Two 100 resistors are
inserted in series with the leads from the sense resistor.
With the addition of R3, a current is generated through R1
causing an offset of:
If V
and Burst Mode operation is prevented from occurring.
Since V
also decreased by the same offset. Thus, to get back to the
same I
To prevent noise spikes from erroneously tripping the
current comparator, a 1000pF capacitor is needed across
Pins 8 and 9.
Output Crowbar
An added feature to using an N-channel MOSFET as the
synchronous switch is the ability to crowbar the output
with the same MOSFET. Pulling the timing capacitor Pin 6
above 1.5V when the output voltage is greater than the
desired regulated value, will turn on the N-channel MOSFET.
A fault condition which causes the output voltage to go
above a maximum value can be detected by external
14
R
V
OFFSET
LTC1149
SENSE
OFFSET
MAX
SENSE
SENSE
OFFSET
Figure 6. Suppressing Burst Mode Operation
> 25mV, the minimum threshold will be cancelled
, the value of the sense resistor must be lower:
+
–
= V
9
8
is constant, the maximum load current is
75mV
I
OUT
MAX
1000pF
U U
R1 + R3
R1
R3
L
100
100
R2
R1
W
R
SENSE
OUT
U
–
+
> 5A)
pin to
C
1149 F06
OUT
circuitry. Turning on the N-channel MOSFET when this
fault is detected will then force the system fuse to blow.
The N-channel MOSFET needs to be sized so it will safely
handle this overcurrent condition. The typical delay from
pulling the C
high is 250ns. Under shutdown conditions, the N-channel
is held off and pulling Pin 6 high will not cause the output
to be crowbarred.
A small N-channel FET can be used as an interface between
the overvoltage detect circuitry and the LTC1149 as shown
in Figure 7.
Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1149 series. These items are also illustrated graphi-
cally in the layout diagram of Figure 8. Check the following
in your layout:
1. Are the signal and power grounds segregated? The
2. Does the LTC1149 SENSE
3. Are the SENSE
LTC1149 signal ground Pin 11 must connect separately
to the (–) plate of C
14 should return to the source of the N-channel MOSFET,
anode of the Schottky diode and (–) plate of C
should have as short lead lengths as possible.
close to R
applications, the resistive divider R1, R2 must be
connected between the (+) plate of C
ground.
minimum PC trace spacing? The differential decou-
pling capacitor between Pins 8 and 9 should be as close
as possible to the LTC1149. Up to 100 may be placed
ACTIVE WHEN CROWBAR = V
OFF WHEN CROWBAR = GROUND
CROWBAR
SENSE
T
Figure 7. Output Crowbar Interface
Pin 6 high to when the NGATE Pin 13 goes
–
and the (+) plate of C
and SENSE
OUT
VN2222LL
. The other ground Pins 12 and
IN
–
+
5
6
leads routed together with
Pin 8 connect to a point
V
C
CC
T
LTC1149
OUT
OUT
1149 F07
? In adjustable
and signal
IN
, which