LM20242MH/NOPB National Semiconductor, LM20242MH/NOPB Datasheet - Page 15

• Manufacturer Part Number: LM20242MH/NOPB
• Description: IC REG SYNC BUCK 2A 20TSSOP
• Manufacturer: National Semiconductor
• Series: PowerWise®r
• Type: Step-Down (Buck)r

Specifications of LM20242MH/NOPB

• Internal Switch(s): Yes
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 0.8 ~ 32 V
• Current - Output: 2A
• Frequency - Switching: 250kHz, 750kHz
• Voltage - Input: 4.5 ~ 36 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP Exposed Pad, 20-eTSSOP, 20-HTSSOP
• Dc To Dc Converter Type: Step Down
• Pin Count: 20
• Input Voltage: 36V
• Output Voltage: 0.8 to 32V
• Switching Freq: 100 to 1000KHz
• Output Current: 2A
• Package Type: TSSOP EP
• Output Type: Adjustable
• Switching Regulator: Yes
• Mounting: Surface Mount
• Input Voltage (min): 4.5V
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• For Use With: LM20242EVAL - BOARD EVAL 2A POWERWISE LM20242
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -
• Lead Free Status / Rohs Status: Compliant
• Other names: *LM20242MH/NOPB; LM20242MH

The second most common power on behavior is known as a
ratiometric start up. This start up is preferred in applications
where both supplies need to be at the final value at the same
time.
Similar to the soft-start function, the fastest start up possible
is 1ms regardless of the rise time of the tracking voltage.
When using the track feature the final voltage seen by the SS/
TRACK pin should exceed 1V to provide sufficient overdrive
and transient immunity.
BENEFIT OF AN EXTERNAL SCHOTTKY
During dead time, the body diode of the synchronous MOS-
FET acts as a free-wheeling diode and conducts the inductor
current. The MOSFET is optimized for high breakdown volt-
age, but this makes an inefficient body diode reverse recovery
charge. The power loss is proportional to load current and
switching frequency. The loss increases at higher input volt-
ages and switching frequencies. One simple solution is to use
a small 1A external Schottky diode between SW and GND as
shown in Figure 10, diodes D1 and D2. The external Schottky
diode effectively conducts all inductor current during the dead
time, minimizing the current passing through the synchronous
MOSFET body diode and eliminating reverse recovery loss-
es.
The external Schottky conducts currents for a very small por-
tion of the switching cycle, therefore the average current is
low. An external Schottky rated for 1A will improve efficiency
by several percent in some applications. A Schottky rated at
a higher current will not significantly improve efficiency and
may be worse due to the increased reverse capacitance. The
forward voltage of the synchronous MOSFET body diode is
approximately 700 mV, therefore an external Schottky with a
forward voltage less than or equal to 700 mV should be se-
lected to ensure the majority of the dead time current is carried
by the Schottky.
THERMAL CONSIDERATIONS
The thermal characteristics of the LM20242 are specified us-
ing the parameter θ
to the ambient temperature. Although the value of θ
pendant on many variables, it still can be used to approximate
the operating junction temperature of the device.
To obtain an estimate of the device junction temperature, one
may use the following relationship:
and
Where:
T
P
θ
LM20242.
T
I
DCR is the inductor series resistance.
It is important to always keep the operating junction temper-
ature (T
temperature exceeds 160°C the device will cycle in and out
OUT
J
JA
A
IN
is the junction temperature in °C.
is the ambient temperature in °C.
is the input power in Watts (P
is the junction to ambient thermal resistance for the
is the output load current.
P
J
D
) below 125°C for reliable operation. If the junction
= P
IN
x (1 - Efficiency) - 1.1 x (I
JA
T
, which relates the junction temperature
J
= P
D
x θ
JA
IN
+ T
= V
A
IN
OUT
x I
IN
)
2
).
x DCR
JA
is de-
15
of thermal shutdown. If thermal shutdown occurs it is a sign
of inadequate heatsinking or excessive power dissipation in
the device.
PCB LAYOUT CONSIDERATIONS
PC board layout is an important part of DC-DC converter de-
sign. Poor board layout can disrupt the performance of a DC-
DC converter and surrounding circuitry by contributing to EMI,
ground bounce, and resistive voltage loss in the traces. These
can send erroneous signals to the DC-DC converter resulting
in poor regulation or instability.
Good layout can be implemented by following a few simple
design rules.
1. Minimize area of switched current loops. In a buck regulator
there are two loops where currents are switched very fast. The
first loop starts from the input capacitor, to the regulator VIN
pin, to the regulator SW pin, to the inductor then out to the
output capacitor and load. The second loop starts from the
output capacitor ground, to the regulator GND pins, to the in-
ductor and then out to the load (see Figure 9). To minimize
both loop areas the input capacitor should be placed as close
as possible to the VIN pin. Grounding for both the input and
output capacitor should consist of a small localized top side
plane that connects to GND and the exposed pad (EP). The
inductor should be placed as close as possible to the SW pin
and output capacitor.
2. Minimize the copper area of the switch node. Since the
LM20242 has the SW pins on opposite sides of the package
it is recommended that the SW pins should be connected with
a trace that runs around the package. The inductor should be
placed at an equal distance from the SW pins using 100 mil
wide traces to minimize capacitive and conductive losses.
3. Have a single point ground for all device grounds located
under the EP. The ground connections for the compensation,
feedback, and soft-start components should be connected
together then routed to the EP pin of the device. The AGND
pin should connect to GND under the EP. If not properly han-
dled poor grounding can result in degraded load regulation or
erratic switching behavior.
4. Minimize trace length to the FB pin. Since the feedback
node can be high impedance the trace from the output resistor
divider to FB pin should be as short as possible. This is most
important when high value resistors are used to set the output
voltage. The feedback trace should be routed away from the
SW pin and inductor to avoid contaminating the feedback sig-
nal with switch noise.
5. Make input and output bus connections as wide as possi-
ble. This reduces any voltage drops on the input or output of
the converter and can improve efficiency. Voltage accuracy
at the load is important so make sure feedback voltage sense
is made at the load. Doing so will correct for voltage drops at
the load and provide the best output accuracy.
6. Provide adequate device heatsinking. Use as many vias as
is possible to connect the EP to the power plane heatsink. For
best results use a 5x3 via array with a minimum via diameter
of 12 mils. "Via tenting" with the solder mask may be neces-
sary to prevent wicking of the solder paste applied to the EP.
See the Thermal Considerations section to insure enough
copper heatsinking area is used to keep the junction temper-
ature below 125°C.
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