CDB5463U Cirrus Logic Inc, CDB5463U Datasheet

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CDB5463U

Manufacturer Part Number
CDB5463U
Description
BOARD EVAL & SOFTWARE CS5463 ADC
Manufacturer
Cirrus Logic Inc
Type
A/Dr
Datasheets

Specifications of CDB5463U

Main Purpose
Power Management, Energy/Power Meter
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
CS5463
Primary Attributes
1-Phase, Energy-to-Frequency Output
Secondary Attributes
GUI, USB, SPI Interfaces
Product
Data Conversion Development Tools
Maximum Clock Frequency
4 MHz
Interface Type
USB
Supply Voltage (max)
5 V
Supply Voltage (min)
3.3 V
For Use With/related Products
CS5463
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
598-1553
Features
http://www.cirrus.com
- Instantaneous Voltage, Current, and Power
- I
- Active Fundamental and Harmonic Power
- Reactive Fundamental, Power Factor, and Line
- Energy-to-pulse Conversion
- System Calibrations and Phase Compensation
- Temperature Sensor
Energy Data Linearity: ±0.1% of Reading
On-chip Functions:
Meets accuracy spec for IEC, ANSI, JIS.
Low Power Consumption
Current Input Optimized for Sense Resistor.
GND-referenced Signals with Single Supply
On-chip 2.5 V Reference (25 ppm/°C typ)
Power Supply Monitor
Simple Three-wire Digital Serial Interface
“Auto-boot” Mode from Serial E
Power Supply Configurations:
over 1000:1 Dynamic Range
(Real) Power
Frequency
VA+ = +5 V; AGND = 0 V; VD+ = +3.3 V to +5 V
RMS
Single Phase, Bi-directional Power/Energy IC
and V
RMS
, Apparent, Reactive, and Active
VREFOUT
VREFIN
VIN+
VIN-
IIN+
IIN-
PGA
x10
x1
Reference
AGND
Voltage
VA+
2nd Order ∆Σ
4th Order ∆Σ
Modulator
Modulator
2
PROM
Monitor
PFMON
Power
Copyright © Cirrus Logic, Inc. 2008
(All Rights Reserved)
Temperature
System
Clock
Sensor
RESET
Digital
Digital
Filter
Filter
/K
XIN XOUT CPUCLK
Description
The CS5463 is an integrated power measure-
ment
analog-to-digital converters, power calculation
engine, energy-to-frequency converter, and a
serial interface on a single chip. It is designed to
accurately measure instantaneous current and
voltage, and calculate V
neous power, apparent power, active power, and
reactive power for single-phase, 2- or 3-wire
power metering applications.
The CS5463 is optimized to interface to shunt re-
sistors or current transformers for current
measurement, and to resistive dividers or poten-
tial transformers for voltage measurement.
The CS5463 features a bi-directional serial inter-
face for communication with a processor and a
programmable energy-to-pulse output function.
Additional features include on-chip functionality
to facilitate system-level calibration, temperature
sensor, voltage sag detection, and phase
compensation.
ORDERING INFORMATION:
Option
Option
Generator
HPF
HPF
Clock
See
Page 45.
device
Calculation
Calibration
Engine
Power
DGND
VD+
which
Interface
E-to-F
Serial
MODE
CS
SDI
SDO
SCLK
INT
E2
E3
E1
combines
RMS
CS5463
, I
RMS
, instanta-
two
DS678F2
APR ‘08
∆Σ

Related parts for CDB5463U

CDB5463U Summary of contents

Page 1

Single Phase, Bi-directional Power/Energy IC Features Energy Data Linearity: ±0.1% of Reading over 1000:1 Dynamic Range On-chip Functions: - Instantaneous Voltage, Current, and Power - I and V , Apparent, Reactive, and Active RMS RMS (Real) Power - Active Fundamental ...

Page 2

TABLE OF CONTENTS 1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 3

Active (Real) Power Register ( P 6.1.8 RMS Current & Voltage Registers ( I 6.1.9 Epsilon Register ( ...

Page 4

LIST OF FIGURES Figure 1. CS5463 Read and Write Timing Diagrams.................................................................. 12 Figure 2. Timing Diagram for E1 Figure 3. Data Measurement Flow Diagram. .............................................................................. 14 Figure 4. Power Calculation Flow. .............................................................................................. 15 Figure 5. Active and Reactive Energy Pulse ...

Page 5

OVERVIEW The CS5463 is a CMOS monolithic power measurement device with a computation engine and an ener- gy-to-frequency pulse output. The CS5463 combines a programmable gain amplifier, two ∆Σ Ana- log-to-Digital Converters (ADCs), system calibration, and a computation engine ...

Page 6

PIN DESCRIPTION Crystal Out CPU Clock Output Positive Digital Supply Digital Ground Serial Clock Serial Data Ouput Chip Select Mode Select Differential Voltage Input Differential Voltage Input Voltage Reference Output Voltage Reference Input Clock Generator Crystal Out 1,24 Crystal ...

Page 7

CHARACTERISTICS & SPECIFICATIONS RECOMMENDED OPERATING CONDITIONS Parameter Positive Digital Power Supply Positive Analog Power Supply Voltage Reference Specified Temperature Range ANALOG CHARACTERISTICS • Min / Max characteristics and specifications are guaranteed over all • Typical characteristics and specifications are ...

Page 8

ANALOG CHARACTERISTICS Parameter Analog Inputs (Voltage Channel) Differential Input Range Total Harmonic Distortion Crosstalk with Current Channel at Full Scale (50, 60 Hz) Input Capacitance Effective Input Impedance Noise (Referred to Input) Offset Drift (Without the High Pass Filter) Gain ...

Page 9

VOLTAGE REFERENCE Parameter Reference Output Output Voltage Temperature Coefficient Load Regulation Reference Input Input Voltage Range Input Capacitance Input CVF Current Notes: 8. The voltage at VREFOUT is measured across the temperature range. From these measurements the following formula is ...

Page 10

Parameter Low-level Input Voltage (VD = 3.3 V) All Pins Except XIN and SCLK and RESET High-level Output Voltage Low-level Output Voltage Input Leakage Current 3-state Leakage Current Digital Output Pin Capacitance Notes: 10. All measurements performed under static conditions. ...

Page 11

SWITCHING CHARACTERISTICS • Min / Max characteristics and specifications are guaranteed over all • Typical characteristics and specifications are measured at nominal supply voltages and °C. • VA ±5% VD+ = 3.3 V ±5% ...

Page 12

...

Page 13

SWITCHING CHARACTERISTICS Parameter E1, E2, and E3 Timing (Note 19 and 20) Period Pulse Width Rising Edge to Falling Edge E2 Setup to E1 and/or E3 Falling Edge E1 Falling Edge to E3 Falling Edge Notes: 19. Pulse output timing ...

Page 14

Order DELAY ∆Σ VOLTAGE x10 REG Modulator 6 PC6 PC5 PC4 PC3 PC2 PC1 PC0 Configuration Register * 4th Order SINC 3 ∆Σ PGA CURRENT Modulator 4. THEORY OF OPERATION The CS5463 is a dual-channel analog-to-digital convert- er (ADC) ...

Page 15

Σ off * PulseRate * + Σ provides a pulse output that is proportional to the reac- tive power or apparent power. Output E3 can ...

Page 16

FUNCTIONAL DESCRIPTION 5.1 Analog Inputs The CS5463 is equipped with two fully differential input channels. The inputs VIN ± and IIN ± are designated as the voltage and current channel inputs, respectively. The full-scale differential input voltage for the ...

Page 17

A register value – ----------------------- - = 0.99999988 23 2 represents the maximum possible value. At each instantaneous measurement, the CRDY bit will ...

Page 18

The pulse output frequency directly proportional to the active power calculated from the input signals. To calculate the output frequency of E1, the following trans- fer function can be utilized: × × × VIN VGAIN IIN IGAIN ...

Page 19

Output pin E3 is high when the line voltage is positive and pin E3 is low when the line voltage is negative. 5.5.5 PFMON Output Mode Setting bit E3MODE[1: (01b) in the Operational Mode Register outputs the state ...

Page 20

The temperature update rate is a function of the number of ADC samples. With MCLK = 4.096 MHz and the update rate is: 2240 samples --------------------------------------- - = 0.56 sec ( ⁄ ) ⁄ MCLK K 1024 ...

Page 21

XOUT should be left unconnected while XIN is driven by the external circuitry. There is an amplifier between XIN and the digital section which provides CMOS level signals. This amplifier works with ...

Page 22

If the serial port interface becomes unsynchronized with respect to the SCLK input, any attempt to clock valid commands into the serial interface may result in unex- pected operation. Therefor, the serial port interface must then be re-initialized by one ...

Page 23

Commands All commands are 8 bits in length. Any command byte value that is not listed in this section is invalid. Commands that write to registers must be followed by 3 bytes of data. Commands that read data can ...

Page 24

Register Read/Write W/R RA4 RA3 RA2 The Read/Write informs the command decoder that a register access is required. During a read operation, the ad- dressed register is loaded into an output buffer and ...

Page 25

Register Page 1 Address RA[4:0] Name 0 00000 PulseWidth 1 00001 Load 2 00010 T 3 00011 T Register Page 3 Address RA[4:0] Name 6 00110 VSAG 7 00111 VSAG 10 01010 ISAG 11 01011 ISAG Note: For proper operation, ...

Page 26

REGISTER DESCRIPTION 1. “Default” = bit status after power-on or reset 2. Any bit not labeled is Reserved. A zero should always be used when writing to one of these bits. 6.1 Page 0 Registers 6.1.1 Configuration Register ( ...

Page 27

Current and Voltage DC Offset Register ( I Address: 1 (Current DC Offset); 3 (Voltage DC Offset) MSB -( Default = 0x000000 The DC Offset registers (I ,V DCoff ...

Page 28

Instantaneous Current, Voltage, and Power Registers ( Address: 7 (Instantaneous Current); 8 (Instantaneous Voltage); 9 (Instantaneous Power) MSB -( and V contain ...

Page 29

Power Offset Register ( P Address: 14 MSB -( Default = 0x000000 Power Offset ( added to the instantaneous power being accumulated in the P off used ...

Page 30

The level at which the modulator oscillates is significantly higher than the voltage channel’s differential input voltage (current) range. Note: The IOD and VOD bits may be ‘falsely’ triggered by very brief ...

Page 31

IHPF (VHPF) Enables the high-pass filter on the current (voltage) channel High-pass filter disabled (default High-pass filter enabled Note: When either IHPF or VHPF are enabled, but not both, an all-pass filter is applied to the ...

Page 32

Reactive Power Register ( Q Address: 24 MSB - The Reactive Power ( calculated using trigonometric identities. (See Section 4.3 Trig on page 14). The value is represented in ...

Page 33

Control Register ( Ctrl ) Register Address Default = 0x000000 STOP Terminates the auto-boot sequence Normal (default Stop sequence INTOD Converts INT output pin to an open drain ...

Page 34

Fundamental Reactive Power Register ( Q (read only) Address: 31 MSB -( Fundamental Reactive Power (Q frequency on the V and I channels. The value is represented in two's ...

Page 35

Page 1 Registers 6.2.1 Energy Pulse Output Width ( PulseWidth ) Address: 0 MSB Default = 1 PulseWidth sets the duration of energy pulses (t divided by the output word ...

Page 36

Page 3 Registers 6.3.1 Voltage Sag and Current Fault Address: 6 (Voltage Sag Duration); 10 (Current Fault Duration) MSB Default = 0x000000 Voltage Sag Duration (VSAG Duration neous measurements utilized ...

Page 37

SYSTEM CALIBRATION 7.1 Channel Offset and Gain Calibration The CS5463 provides digital DC offset and gain com- pensation that can be applied to the instantaneous volt- age and current measurements, and AC offset compensation to the voltage and current ...

Page 38

DC component present in the system during conversion commands. 7.1.2.2 AC Offset Calibration Sequence Corresponding offset registers I should be cleared prior to initiating AC offset calibra- tions. Initiate an AC offset calibration.The AC ...

Page 39

However signal cannot be used for DC gain cal- ibration. 7.1.3.2 DC Gain Calibration Sequence Initiate a DC gain calibration. The corresponding gain register is restored to default (1.0). The DC gain calibra- tion averages the channel’s instantaneous ...

Page 40

AUTO-BOOT MODE USING E When the CS5463 MODE pin is asserted (logic 1), the CS5463 auto-boot mode is enabled. In auto-boot mode, the CS5463 downloads the required commands and register data from an external serial E the CS5463 to ...

Page 41

BASIC APPLICATION CIRCUITS Figure 18 shows the CS5463 configured to measure power in a single-phase, 2-wire system while operating in a single-supply configuration. In this diagram, a shunt resistor is used to sense the line current and a voltage ...

Page 42

VAC N L Voltage Transformer M:1 Low Phase-Shift Potential Transformer N:1 Current Transformer Figure 19. Typical Connection Diagram (Single-phase, 2-wire – Isolated from Power Line) 240 VAC 120 VAC 120 VAC Earth Ground ...

Page 43

VAC Figure 21. Typical Connection Diagram (Single-phase, 3-wire – No Neutral Available) DS678F2 L 2 500 Ω 1 kΩ 470 µF 0.1 µF 235 ...

Page 44

DIMENSIONS 24L SSOP PACKAGE DRAWING TOP VIEW INCHES DIM MIN 0.002 A2 0.064 b 0.009 D 0.311 E 0.291 E1 0.197 e 0.022 L 0.025 ∝ 0° Notes: 3. “D” and ...

Page 45

ORDERING INFORMATION Model CS5463-IS CS5463-ISZ (lead free) 12. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION Model Number CS5463-IS CS5463-ISZ (lead free) * MSL (Moisture Sensitivity Level) as specified by IPC/JEDEC J-STD-020. DS678F2 Temperature -40 to +85 °C Peak Reflow Temp MSL ...

Page 46

REVISION HISTORY Revision Date A1 MAR 2005 Advance Release PP1 AUG 2005 First preliminary release. F1 NOV 2005 First final release, updated with most-current characterization data. F2 APR 2008 Added PulseWidth & Load Contacting Cirrus Logic Support For all ...

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