DP83816-MAAP National Semiconductor, DP83816-MAAP Datasheet - Page 36

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DP83816-MAAP

Manufacturer Part Number
DP83816-MAAP
Description
BOARD EVALUATION DP83816
Manufacturer
National Semiconductor
Datasheet

Specifications of DP83816-MAAP

Main Purpose
Interface, Ethernet
Utilized Ic / Part
DP83816
Lead Free Status / RoHS Status
Not applicable / Not applicable
Secondary Attributes
-
Embedded
-
Primary Attributes
-
4.0 Register Set
4.1.10 Configuration Interrupt Select Register
This register stores the interrupt line number as identified by the POST software that is connected to the interrupt
controller as well as DP83816 desired settings for maximum latency and minimum grant. Max latency and Min latency
can be loaded from the EEPROM.
4.1.11 Power Management Capabilities Register
This register provides information on the capabilities of the functions related to power management. This register also
contains a pointer to the next item in the capabilities list and the capability ID for Power Management. This register is only
visible if CFGCS[4] is set.
31-24
23-16
31-27
15-8
Bit
7-0
Bit
26
25
Bit Name
MNGNT
Bit Name
MXLAT
ILINE
IPIN
PMES
D2S
D1S
Offset: 3Ch
Offset: 40h
(Continued)
Tag: CFGINT
Tag: PMCAP
Maximum Latency
The DP83816 desired setting for Max Latency. The DP83816 will initialize this field to 52d (13 µsec). The
value in this register can be loaded from the EEPROM.
Minimum Grant
The DP83816 desired setting for Minimum Grant. The DP83816 will initialize this field to 11d (2.75 µsec).
The value in this register can be loaded from the EEPROM.
Interrupt Pin
Read Only, always return 0000 0001 (INTA).
Interrupt Line
Set to which line on the interrupt controller that the DP83816's interrupt pin is connected to.
PME Support
This 5 bit field indicates the power states in which DP83816 may assert PMEN. A 1 indicates PMEN
is enabled for that state, a 0 indicates PMEN is inhibited in that state.
The DP83816 will only report PME support for D3cold if auxiliary power is detected on the 3VAUX
pin, in addition this value can be loaded from the EEPROM when in the D3cold state.
D2 Support
This bit is set to a 1 when the DP83816 supports the D2 state.
D1 Support
This bit is set to a 1 when the DP83816 supports the D1 state.
XXXX1 - PMEN can be asserted from state D0
XXX1X - PMEN can be asserted from state D1
XX1XX - PMEN can be asserted from state D2
X1XXX - PMEN can be asserted from state D3hot
1XXXX - PMEN can be asserted from state D3cold
Access: Read Write
Access: Read Only
Size: 32 bits
Size: 32 bits
36
Description
Description
Hard Reset: 340b0100h
Hard Reset: FF820001
Soft Reset: unchanged
Soft Reset: unchanged
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