LM3553SDEV National Semiconductor, LM3553SDEV Datasheet - Page 12

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LM3553SDEV

Manufacturer Part Number
LM3553SDEV
Description
BOARD EVALUATION FOR LM3553S
Manufacturer
National Semiconductor
Series
PowerWise®r
Datasheets

Specifications of LM3553SDEV

Current - Output / Channel
1.2A
Outputs And Type
1, Non-Isolated
Features
Camera Flash and Torch Modes, I²C Interface, Programmable Output Current
Voltage - Input
2.7 ~ 5.5V
Utilized Ic / Part
LM3553
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Voltage - Output
-
www.national.com
Application Information
INDUCTOR SELECTION
The LM3553 is designed to use a 2.2µH inductor. When the
device is boosting (V
biggest sources of efficiency loss in the circuit. Therefore,
choosing an inductor with the lowest possible series resis-
tance is important. Additionally, the saturation rating of the
inductor should be greater than the maximum operating peak
current of the LM3553. This prevents excess efficiency loss
that can occur with inductors that operate in saturation and
prevents over heating of the inductor and possible damage.
For proper inductor operation and circuit performance ensure
that the inductor saturation and the peak current limit setting
of the LM3553 (2.6A or 1.8A) is greater than I
be calculated by:
Manufacturer
Toko
Coilcraft
TDK
Safety Timer Terminated Pulse
Recommended Inductors
Part#
FDSE312-2R2M
LPS4012-222ML
VLF4014ST-2R2M1R9
TX Terminated Pulse
OUT
> V
IN
) the inductor is one of the
20171425
L / I
2.2µH / 2.3A
2.2µH / 2.3A
2.2µH / 2.0A
PEAK
SAT
. I
20171427
20171428
PEAK
can
12
CAPACITOR SELECTION
The LM3553 requires 2 external capacitors for proper opera-
tion (C
(single LED) or 4.7µF (series LEDs)). Surface-mount multi-
layer ceramic capacitors are recommended. These capaci-
tors are small, inexpensive and have very low equivalent
series resistance (ESR <20mΩ typ.). Tantalum capacitors,
OS-CON capacitors, and aluminum electrolytic capacitors are
not recommended for use with the LM3553 due to their high
ESR, as compared to ceramic capacitors.
For most applications, ceramic capacitors with X7R or X5R
temperature characteristic are preferred for use with the
LM3553. These capacitors have tight capacitance tolerance
(as good as ±10%) and hold their value over temperature
(X7R: ±15% over -55°C to 125°C; X5R: ±15% over -55°C to
85°C).
Capacitors with Y5V or Z5U temperature characteristic are
generally not recommended for use with the LM3553. Ca-
pacitors with these temperature characteristics typically have
wide capacitance tolerance (+80%, -20%) and vary signifi-
cantly over temperature (Y5V: +22%, -82% over -30°C to
+85°C range; Z5U: +22%, -56% over +10°C to +85°C range).
Under some conditions, a nominal 1µF Y5V or Z5U capacitor
could have a capacitance of only 0.1µF. Such detrimental de-
viation is likely to cause Y5V and Z5U capacitors to fail to
meet the minimum capacitance requirements of the LM3553.
The recommended voltage rating for the input capacitor
is 10V (min = 6.3V). For a single flash LED, the recom-
mended output capacitor voltage rating is 10V (min =
6.3V), and for series LEDs the recommended voltage is
25V (min = closest voltage rating above the sum of
(V
into account the DC bias capacitance losses, while the
minimum rating takes into account the OVP trip levels.
SCHOTTKY DIODE SELECTION
The output diode must have a reverse breakdown voltage
greater than the maximum output voltage. The diodes aver-
age current rating should be high enough to handle the
LM3553’s output current. Additionally, the diodes peak cur-
rent rating must be high enough to handle the peak inductor
current. Schottky diodes are recommended due to their lower
forward voltage drop (0.3V to 0.5V) compared to ( 0.8V) for
PN junction diodes.
LAYOUT CONSIDERATIONS
The LLP is a leadless package with very good thermal prop-
erties. This package has an exposed DAP (die attach pad) at
the underside center of the package measuring 1.86mm x
2.2mm. The main advantage of this exposed DAP is to offer
low thermal resistance when soldered to the thermal ground
pad on the PCB. For good PCB layout a 1:1 ratio between the
package and the PCB thermal land is recommended. To fur-
ther enhance thermal conductivity, the PCB thermal ground
pad may include vias to a 2nd layer ground plane. For more
detailed instructions on mounting LLP packages, please refer
to National Semiconductor Application Note AN-1187.
The high switching frequencies and large peak currents make
the PCB layout a critical part of the design. The proceeding
steps must be followed to ensure stable operation and proper
current source regulation.
1.
LED
If possible, divide ground into two planes, one for the
return terminals of C
for the return terminals of R
the exposed DAP, but nowhere else.
× N
IN
= 10µF recommended (4.7µF min.) and C
LEDs
) and V
FB
). The recommended value takes
OUT
, C
IN
SET
and the I
. Connect both planes to
2
C Bus, the other
OUT
= 10µF

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