C8051F320DK Silicon Laboratories Inc, C8051F320DK Datasheet - Page 122

DEV KIT FOR C8051F320/F321

C8051F320DK

Manufacturer Part Number
C8051F320DK
Description
DEV KIT FOR C8051F320/F321
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F320DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F320/F321
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F320
Silicon Family Name
C8051F32x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051F320, C8051F321
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1260

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F320DK
Manufacturer:
SiliconL
Quantity:
4
C8051F320/1
13.3. 4x Clock Multiplier
The 4x Clock Multiplier allows a 12 MHz oscillator to generate the 48 MHz clock required for Full Speed
USB communication (see Section “15.4. USB Clock Configuration” on page 146). A divided version of the
Multiplier output can also be used as the system clock. See Section 13.4 for details on system clock and
USB clock source selection.
The 4x Clock Multiplier is configured via the CLKMUL register. The procedure for configuring and enabling
the 4x Clock Multiplier is as follows:
Important Note: When using an external oscillator as the input to the 4x Clock Multiplier, the exter-
nal source must be enabled and stable before the Multiplier is initialized. See Section 13.4 for
details on selecting an external oscillator source.
122
Bit7:
Bit6:
Bit5:
Bits4–2: Unused. Read = 000b; Write = don’t care.
Bits1–0: MULSEL: Clock Multiplier Input Select
MULEN
R/W
Bit7
1. Reset the Multiplier by writing 0x00 to register CLKMUL.
2. Select the Multiplier input source via the MULSEL bits.
3. Enable the Multiplier with the MULEN bit (CLKMUL | = 0x80).
4. Delay for >5 µs.
5. Initialize the Multiplier with the MULINIT bit (CLKMUL | = 0xC0).
6. Poll for MULRDY => ‘1’.
MULEN: Clock Multiplier Enable
0: Clock Multiplier disabled.
1: Clock Multiplier enabled.
MULINIT: Clock Multiplier Initialize
This bit should be a ‘0’ when the Clock Multiplier is enabled. Once enabled, writing a ‘1’ to
this bit will initialize the Clock Multiplier. The MULRDY bit reads ‘1’ when the Clock Multiplier
is stabilized.
MULRDY: Clock Multiplier Ready
This read-only bit indicates the status of the Clock Multiplier.
0: Clock Multiplier not ready.
1: Clock Multiplier ready (locked).
These bits select the clock supplied to the Clock Multiplier.
MULINIT MULRDY
R/W
Bit6
SFR Definition 13.4. CLKMUL: Clock Multiplier Control
MULSEL
00
01
10
11
Bit5
R
R/W
Bit4
-
External Oscillator / 2
External Oscillator
Internal Oscillator
Selected Clock
RESERVED
Rev. 1.4
R/W
Bit3
-
R/W
Bit2
-
R/W
Bit1
MULSEL
R/W
Bit0
SFR Address
00000000
Reset Value
0xB9

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