EZ80F920200ZCO Zilog, EZ80F920200ZCO Datasheet

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EZ80F920200ZCO

Manufacturer Part Number
EZ80F920200ZCO
Description
KIT DEV FOR EZ80F92 W/C-COMPILER
Manufacturer
Zilog
Series
eZ80 Acclaim!®r
Type
MCUr
Datasheet

Specifications of EZ80F920200ZCO

Contents
2 Primary Boards, Hardware, Software and Documentation
For Use With/related Products
eZ80F92
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3162
EZ80F920200ZCO
eZ80F92 Development Kit
User Manual
PRELIMINARY
UM013904-0203
ZiLOG Worldwide Headquarters • 532 Race Street • San Jose, CA 95126
Telephone: 408.558.8500 • Fax: 408.558.8300 •
www.ZiLOG.com

Related parts for EZ80F920200ZCO

EZ80F920200ZCO Summary of contents

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... Development Kit User Manual PRELIMINARY UM013904-0203 ZiLOG Worldwide Headquarters • 532 Race Street • San Jose, CA 95126 Telephone: 408.558.8500 • Fax: 408.558.8300 • www.ZiLOG.com ...

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... Document Disclaimer ZiLOG is a registered trademark of ZiLOG Inc. in the United States and in other countries. All other products and/or service names mentioned herein may be trademarks of the companies with which they are associated. ©2003 by ZiLOG, Inc. All rights reserved. Information in this publication concerning the devices, applications, or technology described is intended to suggest possible uses and may be superseded ...

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Safeguards The following precautions must be observed when working with the devices described in this document. Caution: Always use a grounding strap to prevent damage resulting from electrostatic discharge (ESD). UM013904-0203 eZ80F92 Development Kit PRELIMINARY User Manual iii Safeguards ...

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Development Kit User Manual iv PRELIMINARY UM013904-0203 ...

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Table of Contents Safeguards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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... JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Application Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 ZDSII . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Troubleshooting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Cannot Download Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 No Output on Console Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 IrDA Port Not Working . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Contacting ZiLOG Customer Support . . . . . . . . . . . . . . . . . . . . . . . . . 58 Schematic Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 eZ80 eZ80F92 Flash Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Appendix General Array Logic Equations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 U10 Address Decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 U15 Address Decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 Customer Feedback Form . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 Table of Contents ® ...

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List of Figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Memory Map of the eZ80 Figure 11. Physical Dimensions of the eZ80F92 Flash Module . . . ...

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Development Kit User Manual viii Figure 21. eZ80 Figure 22. Schematic Diagram 9—Top Level . . . . . . . . . . . . . 64 Figure 23. Schematic Diagram 9—100-Pin QFP eZ80F92 ...

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List of Tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table ...

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Development Kit User Manual x List of Tables PRELIMINARY UM013904-0203 ...

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... The eZ80F92 Development Kit provides a general-purpose platform for evaluating the capabilities and operation of ZiLOG’s eZ80F92 microcon- troller. The eZ80F92 is a member of ZiLOG’s eZ80Acclaim! product line, which offers on-chip Flash capability. The eZ80F92 Development Kit features two primary boards: the eZ80 the eZ80F92 Flash Module ...

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... Also available is the eZ80F93 microcontroller, which features 64KB of internal Flash memory and 4KB of internal SRAM. Please contact your local Kit Features Two RS232 connectors—console, modem RS485 connector with cable assembly ZiLOG Debug Interface (ZDI) JTAG Debug Interface 9VDC power connector Telephone jack 2 ...

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... The eZ80 Flash Module, can operate in stand-alone mode with Flash memory, or interface via the ZPAKII emulator to a host PC running ZiLOG Devel- oper Studio II Integrated Development Environment (ZDS IDE) software. The address bus, data bus, and all eZ80F92 Flash Module control signals are buffered on the eZ80 drive capability ...

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Development Kit User Manual 4 A block diagram of the eZ80 Flash Module is shown in Figure 1. Peripheral Device Signals eZ80F92 SRAM (512 KB) Battery & Oscillator for RTC IrDA Transceiver Figure 1. eZ80 ® eZ80 Development Platform ...

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Figure photographic representation of the eZ80 form segmented into its key blocks, as shown in the legend for the figure. Note: Key to blocks A–E. A. Power and serial communications. B. eZ80F92 Flash Module interface. C. Debug ...

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Development Kit User Manual 6 Figure photographic representation of the eZ80F92 Flash Module segmented into its key blocks, as shown in the legend for the figure. Note: Key to blocks A–C. A. eZ80F92 Flash Module interfaces. ...

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Development Platform This section describes the eZ80 components and its interfaces, including detailed programmer interface information such as memory maps, register definitions, and interrupt usage. Functional Description ® The eZ80 blocks. These blocks, listed below, are diagrammed in ...

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Development Kit User Manual 8 eZ80™ Flash MPU Module Interface Figure 4. Basic eZ80 Functional Description Peripheral Device Signals Address Bus Data Bus SRAM (512 MB) Embedded (7x5 matrix) GPIO and Address Decoder Application Module ...

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Physical Dimensions The dimensions of the eZ80 x182.9mm. The overall height is 38.1mm. See Figure 5. 43.2 mm 96.5 mm 5.1 mm Figure 5. Physical Dimensions of the eZ80 UM013904-0203 eZ80F92 Development Kit ® Development Platform PCB is 177.8mm 175.3 ...

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Development Kit User Manual 10 Operational Description The eZ80 modules, provided that the module interfaces correctly to the eZ80 Development Platform. The purpose of the eZ80 is to provide the application developer with a tool to evaluate the features ...

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GND_EXT DIS_ETH GND_EXT BUSACK Figure 6. eZ80 Peripheral Bus Connector Pin Configuration—JP1 UM013904-0203 JP1 A10 A13 9 10 A15 11 12 A18 13 14 A19 ...

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Development Kit User Manual 12 Peripheral Bus Connector Identification—JP1* Pin # Symbol A10 GND A13 A15 12 A14 13 A18 ...

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Table 2. eZ80 Peripheral Bus Connector Identification—JP1* (Continued) Pin # Symbol Signal Direction 16 GND A11 20 A12 A20 A17 25 DIS_ETH 26 DIS_FLASH 27 A21 ...

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Development Kit User Manual 14 Peripheral Bus Connector Identification—JP1* (Continued) Pin # Symbol 31 CS0 32 CS1 33 CS2 GND MREQ ...

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Table 2. eZ80 Peripheral Bus Connector Identification—JP1* (Continued) Pin # Symbol Signal Direction INSTRD 49 BUSACK 50 BUSREQ Notes: 1. For the sake of simplicity in describing the interface, Power and Ground nets are omitted ...

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Development Kit User Manual 16 I/O Connector Figure 7 illustrates the pin layout of the I/O Connector in the 50-pin header, located at position JP2 on the eZ80 Table 3 describes the pins and their functions. GND_EXT GND_EXT Operational ...

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Table 3. eZ80 I/O Connector Identification—JP2* Pin # Symbol Signal Direction 1 PB7 2 PB6 3 PB5 4 PB4 5 PB3 6 PB2 7 PB1 8 PB0 9 GND 10 PC7 11 PC6 12 PC5 13 PC4 14 PC3 15 ...

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Development Kit User Manual 18 I/O Connector Identification—JP2* (Continued) Pin # Symbol 19 PD6 20 GND 21 PD5 22 PD4 23 PD3 24 PD2 25 PD1 26 PD0 27 TDO 28 TDI/ZDA 29 GND 30 TRIGOUT 31 TCK/ZCL 32 ...

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Table 3. eZ80 I/O Connector Identification—JP2* (Continued) Pin # Symbol Signal Direction 37 SDA 38 GND 39 FlashWE 40 GND 41 CS3 42 DIS_IrDA 43 RESET 44 WAIT GND 47 HALT_SLP 48 NMI ...

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... Application Module Interface An Application Module Interface is provided to allow the user to add an application-specific module to the eZ80 ZiLOG’s Thermostat Application Module (not provided in the kit example application-specific module that demonstrates an HVAC control system. Implementing an application module with the Application Mod- ...

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Development Platform, because the eZ80F92 Flash Module features the eZ80F92 microcontroller. To mount an application module, use the two male headers J6 and J8. Jumper J6 carries the General Purpose Input/Output ports (GPIO), and jumper J8 carries ...

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Development Kit User Manual 22 Table 4. GPIO Connector J6* (Continued) Signal Pin # PC[7:0] 39,41,43, 45,47,49, 51,53 ID_[2:0] 6,8,10 CON_DIS 12 Reserved 16,18 PD[7:0] 22,24,26, 28,30,32, 34,36 PB[7:0] 40,42,44, 46,48,50, 52,54 Note: *All of the signals are driven ...

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Signal Pin # A[0:7] 3–10 A[8:15] 13–20 A[16:23] 23– RESET 35 BUSACK 37 NMI 39 D[0:7] 43–50 CS[0:3] 53–56 MREQ INSTRD 36 BUSREQ 38 PHI 40 Note: *All of the signals except BUSACK and INSTRD ...

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Development Kit User Manual 24 These functions are memory-mapped with an address decoder based on the Generic Array Logic GAL22lV10D (U15) device manufactured by Lattice Semiconductor, and a bidirectional latch (U16). Additionally, U15 is used to decode addresses for ...

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Table 7. LED Anode/GPIO Port A Output Control Register (Continued) Function Anode Col 4 Anode Col 5 Anode Col 6 Anode Col 6 GPIO Output The GPIO Data Register receives inputs or provides outputs for each of the seven GPIO ...

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Development Kit User Manual 26 sample program that is shipped with this kit displays the alphanumeric message: eZ80 To illuminate any LED in the matrix, its respective anode bit must be set to 1 and its corresponding cathode bit ...

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... Trig1 and Trig2 signals are driven High. If either bit is 0, the corresponding Trig1 and Trig2 signals are driven Low. UM013904-0203 eZ80F92 Development Kit eZ80Acclaim! Development Kits Quick Start (UM0144). J21 J22 Ground Trigger output Trig2 Trig1 PRELIMINARY User Manual 27 ZiLOG Developer Stu- ® Operational Description ...

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Development Kit User Manual 28 Embedded Modem Socket Interface The eZ80 modem (a modem is not included in the kit). Connectors J1, J5, and J9 provide connection capability. The modem socket interface provided by these three connectors is shown ...

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Pin Symbol Description 1 MRESET Reset, active Low, 50–100ms. Closure to GND for reset. 3 GND Ground DCD indicator; can drive an LED anode without additional circuitry RxD indicator; can drive an LED anode without additional ...

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Development Kit User Manual 30 Components P4, T1, C3, C4, and U11 provide the phone line interface to the modem. On the eZ80 D4 function as status indicators for this optional modem. The phone line connection for the modem ...

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U18, address range 3. U17, address range If SRAM memory is installed in a different order than the above sequence, SRAM will not be contiguous unless the user is able to change the address decoder, U10. Memory access decoding ...

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Development Kit User Manual 32 On-chip SRAM Off-chip Flash memory Off-chip Flash memory On-chip Flash memory Figure 10. Memory Map of the eZ80 Operational Description FFFFFFh 8 KB FFE000h Available Address Space DFFFFFh SRAM Memory ...

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LEDs As stated earlier, LEDs D1, D2, D3, and D4 function as status indicators for an optional modem. This section describes each LED and the LED matrix device. Data Carrier Detect The Data Carrier Detect (DCD) signal at D1 indicates ...

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Development Kit User Manual 34 PB1 The PB1 push button switch, SW2, is connected to bit 1 of GPIO Port B. This switch can be used as the port input if required by the user. PB2 The PB2 push ...

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Jumper J3 The J3 jumper connection controls Port A emulation mode and communi- cation with the 7x5 LED. When the shunt is placed, Port A emulation is disabled. See Table 14. Shunt Status Function In Application Module Hardware Disabled Out ...

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Development Kit User Manual 36 Jumper J11 The J11 jumper connection controls access to the Flash memory device. When the shunt is placed, access to the Flash device is disabled/pre- vented. See Table 16. Shunt Status Function In All ...

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Jumper J14 The J14 jumper connection controls the polarity of the Ring Indicator. See Table 18. Shunt Status Function 1–2 The Ring Indicator for UART1 is inverted. 2–3 The Ring Indicator for UART1 is not inverted. Jumper J15 The J15 ...

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Development Kit User Manual 38 Jumper J16 The J16 jumper connection controls the selection of the RS485 circuit. However, UART1 MODEM interface and the socket modem interface are disabled if the RS485 circuit is enabled. When the shunt is ...

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... ZPAKII emulator, PC serial ports, external modems, the con- sole, and LAN/telephone lines. J6 and J8 are the headers, or connectors, that provide pin-outs to connect any external application module, such as ZiLOG’s Thermostat Applica- tion Module. Connector J6 The J6 connector provides pin-outs to make use of GPIO functionality. ...

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Development Kit User Manual 40 Console Connector P2 is the RS232 terminal, which can be used for observing the console output. P2 can be connected to the HyperTerminal if required. Modem Connector P3 provides a terminal for connecting an ...

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DC Characteristics Understanding proper DC current requirements for the eZ80 ment Platform when application modules are plugged into it is very important for developing applications. This section provides an estimate of the average current requirement when different combinations of these ...

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Development Kit User Manual 42 Table 24. DC Current Characteristics of the ® eZ80 Development Platform with Different Module Loads (Continued) Platform/Modules Configurations ® eZ80 Development Platform, eZ80F92 Flash Module, and Modem Module ® eZ80 Development Platform, eZ80F92 Flash ...

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... Development Platform. This small-footprint module provides a CPU, RAM, an IrDA transceiver, and a real-time clock. This low-cost, expandable module is powered by the eZ80F92 microcontroller, members of ZILOG’s new eZ80 tery and an oscillator in support of the on-chip Real-Time Clock (RTC). The eZ80F92 Flash Module can also be used as a stand-alone develop- ment tool when provided with an external power source ...

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Development Kit User Manual 44 Physical Dimensions The dimensions of the eZ80F92 Flash Module PCB is 64x64mm. With an RJ-45 Ethernet connector, the overall height is 25mm. See Figure 11. 8.3 mm max. 1 2.54 mm Figure 11. Physical ...

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Figure 12 illustrates the top layer silkscreen of the eZ80F92 Flash Mod- ule. Figure 12. eZ80F92 Flash Module—Top Layer UM013904-0203 eZ80F92 Development Kit PRELIMINARY User Manual 45 Functional Description ...

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Development Kit User Manual 46 Figure 13 illustrates the bottom layer silkscreen of the eZ80F92 Flash Module. Figure 13. eZ80F92 Flash Module—Bottom Layer Functional Description PRELIMINARY UM013904-0203 ...

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Operational Description The purpose of the eZ80F92 Flash Module as a feature of the eZ80F92 Development Kit is to provide the application developer with a plug-in tool to evaluate the memory, IrDA, and other features of the eZ80F92 device. eZ80F92 ...

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... To enable the IrDA trans- ceiver, DIS_IRDA is left floating and PD2 is set to Low. The eZ80F92 Flash Module contains a ZiLOG IrDA transceiver that is connected to the UART0 port. This port can be used as a wireless connec- tion into the eZ80F92 Flash Module. The UART0 can connect to a stan- dard RS232 port can be confi ...

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Only a few registers are required to configure the UART0 port to send and receive IrDA data. The RxD and TxD signals on the transceiver perform the same functions as a ...

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Development Kit User Manual 50 enables received data to pass into the UART0 Receive FIFO data buffer. Bit test function that provides a loopback sequence from the TxD pin to the RxD input. Bit 1, the ...

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DC Characteristics As different combinations of application modules are loaded onto the ® eZ80 Development Platform, current requirements change. Please see Table 24 on page 41 to reference current consumption values for these different module combinations. A 0.1-Farad capacitor is ...

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Development Kit User Manual 52 Changing the Power Supply Plug The universal 9VDC power supply offers three different plug configura- tions and a tool that aids in removing one plug configuration to insert another, as shown in Figure 15. ...

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Figure 16. Inserting a New Plug Configuration UM013904-0203 eZ80F92 Development Kit PRELIMINARY Changing the Power Supply Plug User Manual 53 ...

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... Connector P1 is the JTAG connector on the eZ80 form. JTAG will be supported in the next offering of eZ80 Application Modules ZiLOG offers the Thermostat Application module, which can be used for evaluating and developing process control and simple I/O applications. The Thermostat Application module is equipped with an LCD display that can be used to display process control and other physical parameters ...

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... For additional reading about the Thermostat application, please see the Java Thermostat Demo Application Note UM013904-0203 eZ80F92 Development Kit (AN0104) on zilog.com. PRELIMINARY User Manual 55 Application Modules ...

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... Development Kit User Manual 56 ZDS II ZiLOG Developer Studio II (ZDS II) Integrated Development Environ- ment is a complete stand-alone system that provides a state-of-the-art development environment. Based on the Windows SP6/Win2000-SP2/WinXP user interfaces, ZDS II integrates a language- sensitive editor, project manager, C-Compiler, assembler, linker, librarian, and source-level symbolic debugger that supports the eZ80F92. ...

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... Troubleshooting Overview Before contacting ZiLOG Customer Support to submit a problem report, please follow these simple steps hardware failure is suspected, con- tact a local ZiLOG representative for assistance. Cannot Download Code If you are unable to download code to RAM using ZDS, make sure to press and release the Reset button on the eZ80 ...

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... For additional troubleshooting solutions, see ZDS Online Help. For valuable information about hardware and software development tools, visit ZiLOG Customer Support sion of Get the latest UM013904-0203 online. Download the latest released ver- ZiLOG Developer Studio! software updates from ZiLOG as soon as they are available! ...

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Schematic Diagrams ® eZ80 Development Platform Figures 17 through 21 diagram the layout of the eZ80 DO NOT USE J6_17 AND J6_35 J6 VCC 1 2 9V_DC 9VDC 3 4 ID_2 SCL 5 6 ID_2 ID_1 SDA ID_1 7 8 ...

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A[23: A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 U12 D[7:0] A20 A21 A22 A23 D[7:0] D3 ...

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A[23:0] A[23:0] A0 A[23:0] U17 ...

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VDD C13 0.1uF U22 28 27 C1+ V+ C14 24 3 C1- V- C15 0.1 1 C2+ 0.1 2 C2- TXD0 14 9 PD0_TXD0 T1IN T1OUT GND 13 10 T2IN T2OUT 12 11 RTS0 PD2_RTS0 T3IN T3OUT 22 -CON_DIS FORCEOFF ...

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Figure 21. eZ80 UM013904-0203 MATES WITH AMP = 749268 LENGTH = 5' WIRES 28 AWG ® Development Platform Schematic Diagram 5—RS-485 Cable PRELIMINARY eZ80F92 Development Kit User Manual 63 ...

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Flash Module Figures 22 through 30 diagram the layout of the eZ80F92 Flash Module. Ethernet circuiting devices are not loaded on the eZ80F92 Flash Module. However, these devices appear in the following schematics for reference purposes RAM ...

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IICSDA IICSDA IICSCL IICSCL CLK_OUT CLK_OUT PB[0..7] PB[0..7] PC[0..7] PC[0..7] PD[0..7] A0 PD[0.. -RESET A4 -RESET A5 JTAG[1..4] JTAG[1..4] TDO TDO A6 A7 -RD A8 -RD A9 -WR A10 -WR A11 -IOREQ A12 -IOREQ A13 -MREQ ...

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D[0..7] D[0..7] A[0..23] A[0..23] -CS1 -CS1 -RD -RD -WR -WR U2D 9 8 74LVC04/SO U2E 11 10 74LVC04/SO UM013904-0203 A19/A20/A21/A22/A23 not used here U1 A18 A18 A17 A16 ...

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A[0..23 A10 36 A11 6 A12 5 A13 4 A14 3 A15 2 A16 1 A17 40 A18 13 A19 ...

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V3.3 VDD VSS GND 26 SD9 27 SD8 28 R22 MEMW 29 4k7 MEMR 30 INTRQ2 31 INTRQ1 ETHIRQ 32 INTRQ0 33 IOCS16 34 MEMCS16 35 INTRQ3 36 CS8900A-CQ3 SHBE SA0 37 SA0 SA1 38 SA1 SA2 39 SA2 SA3 ...

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Maxim MAX6802UR29D3 IRDA_TXD IRDA_TXD IRDA_RXD IRDA_RXD IRDA_SD IRDA_SD UM013904-0203 power supervisor V3.3 C9 100nF R3 U4 0603 2k2 0603 -RESET 2 RESET open-drain C10 MAX6328UR29 10nF SOT-23-L3 0603 IR-transceiver V3.3 R5 C11 68R 330nF R6 U5 2R7, 0.25W 5 ...

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A[0..23] A[0..23] D[0..7] D[0..7] -CS[0..3] R7 -CS[0..3] 4k7 IICSDA IICSDA IICSCL IICSCL R9 CLK_OUT CLK_OUT 33 -DIS_FLASH place near eZ80 -DIS_FLASH -CS_RAM output (PHI) -CS_RAM -DIS_IRDA -DIS_IRDA -FLASHWE -FLASHWE RTC_VDD RTC_VDD PB[0..7] PB[0..7] PC[0..7] PC[0..7] PD[0..7] PD[0..7] -RESET -RESET -RD ...

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V3.3 V3.3 V3.3 GND GND GND no power supply on board! Input: VDD(=V3.3) = 3.3V ±5% Power: Pmax = 1.6W Ptyp = 0.4W Current: Imax = 200mA (IrDA not in use) Imax = 460mA (IrDA in use) Ityp = 100mA ...

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D[0..7] D[0..7] A[0..23] only A0,A1,A2,A3 A[0..23] are used here PD[0..7] PD3 and PD5 PD[0..7] not used here -RESET -RESET -WAIT -WAIT -RD -RD -WR -WR -CS1 and-CS2 -CS[0..3] -CS[0..3] not used here R30 10k U2B 0603 -DIS_FLASH 3 4 74LCX04 ...

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Appendix A General Array Logic Equations This appendix shows the equations for disabling the Ethernet signals pro- vided by the U10 and U15 General Array Logic (GAL) devices. U10 Address Decoder //`define idle //`define state1 //`define state2 //`define state3 // ...

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Development Kit User Manual 74 nEX_FL_DIS, nEM_EN, nDIS_FL, nL_RD, nmemen1, nmemen2, nmemen3, nmemen4 ); input nFL_DIS nCS0 nCS2 nEX_FL_DIS General Array Logic Equations //disables Flash on the expansion //module, when Low ...

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output nCS_EX /* synthesis loc="P17"*/, nmemen1 /* synthesis loc="P18"*/, nmemen2 /* synthesis loc="P19"*/, nmemen3 /* synthesis loc="P20"*/, nmemen4 /* synthesis loc="P21"*/, nEM_EN /* synthesis loc="P24"*/, nDIS_FL /* synthesis loc="P25"*/, nL_RD /* synthesis loc="P23"*/ ; wire nCS_EX, nmemen1, nmemen2, nmemen3, nmemen4; ...

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Development Kit User Manual 76 wire nDIS_FL = nFL_DIS & nEXP_EN; assign nCS_EX = (nEX_FL_DIS) ? nEXP_EN : ~(nEX_FL_DIS); assign nL_RD = ~((nmemen1==0)|(nmemen2==0)|(nmemen3==0)|(nmemen4==0)|(nEM_EN==0)|( nCS_EX==0)); assign nmemen4 = ~((nCS2==0)&({A7,A6,A5,A4,A3}==5'h17)); assign nmemen3 = ~((nCS2==0)&({A7,A6,A5,A4,A3}==5'h16)); assign nmemen2 = ~((nCS2==0)&({A7,A6,A5,A4,A3}==5'h15)); assign nmemen1 = ...

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A1, A2, A3, A4, A5, A6, A7, nRD, nCS, nWR, nMEMRQ, nIORQ, nEM_RD, nEM_WR, nAN_WR, nCT_WR, nDIS_ETH ); input nDIS_EM /* synthesis loc="P3"*/, nEM_EN /* synthesis loc="P4"*/, A0 /* synthesis loc="P5"*/, A1 /* synthesis loc="P6"*/, A2 /* synthesis loc="P10"*/, A3 ...

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Development Kit User Manual 78 nRD nCS nWR nMEMRQ /* synthesis loc="P16"*/; output nEM_RD /* synthesis loc="P17"*/, nEM_WR /* synthesis loc="P18"*/, nCT_WR /* synthesis loc="P19"*/, nAN_WR /* synthesis loc="P20"*/, nDIS_ETH /* synthesis loc="P21"*/; parameter anode=8'h00; parameter cathode=8'h01; parameter latch=8'h02; ...

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... Customer Feedback Form If you note any inaccuracies while reading this User Manual, please copy and complete this form, then mail or fax it to ZiLOG (see eZ80F92 Development Kit Serial # or Board Fab #/Rev. # Software Version Document Number Host Computer Description/Type Customer Information Name ...

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