DK-SI-4SGX230N Altera, DK-SI-4SGX230N Datasheet - Page 13

• Manufacturer Part Number: DK-SI-4SGX230N
• Description: KIT DEV STRATIX IV 4SGX230N/C2
• Manufacturer: Altera
• Series: Stratix® IV GXr
• Type: FPGAr

Specifications of DK-SI-4SGX230N

• Contents: Board, Cables, CD, Power Supply
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2592; DK-SI-4SGX230N/C2

Introduction
Board Update Portal
Connecting to the Board Update Portal Web Page
© February 2009 Altera Corporation
1
This chapter describes the Board Update Portal which allows you to upload new
designs and provides access to useful and relevant information about the kit.
This development kit is shipped with an example design stored in the factory portion
of the flash memory on the board. Whenever jumper J62 is set to LOAD FACTORY,
the Stratix IV GX FPGA is automatically configured with the Board Update Portal
example design. The example design is an embedded webserver, which serves the
Board Update Portal web page. The web page allows you to upload new FPGA
designs to the designated user flash memory on your board, and also provides links
to useful information, on the Altera website at www.altera.com, including links to
kit-specific and design resources.
After the Board Update Portal is used to successfully update a user design, jumper J62
can be set to LOAD USER and the user design configures upon reset or power up.
This cycle can be repeated for different user designs as long as the factory Board
Update Portal is preserved. If the Board Update Portal is corrupted or deleted from
the flash memory, refer to
page A–4
The source for the Board Update Portal design can be found in the examples directory
installed from the CD-ROM included in the development kit. It consists of a Nios II
embedded processor, an Ethernet MAC, and an HTML webserver. When the board is
connected to the network, the Nios II processor obtains an IP address and allows the
browser access to its HTML web page.
This section provides instructions on how to connect to the Board Update Portal web
page.
Before you proceed, ensure that you have the following:
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■
■
1. With the board powered down, make sure jumper J62 is in the LOAD FACTORY
2. Attach the Ethernet cable from the board to the LAN.
3. Power up the board. The board connects to the LAN’s gateway router, and obtains
A PC with a connection to a working Ethernet port on a DHCP enabled network.
A separate working Ethernet port connected to the same network for the board.
The Ethernet and power cables that are included in the kit.
position.
an IP address. The LCD on the board displays the IP address.
to restore the board to factory condition.
“Restoring the Factory Design to the Flash Device” on
Transceiver Signal Integrity Development Kit, Stratix IV GX Edition User Guide
5. Board Update Portal