AT91EB63 Atmel, AT91EB63 Datasheet - Page 14

• Manufacturer Part Number: AT91EB63
• Description: ARM M63200 & M43300 EVAL KIT
• Manufacturer: Atmel
• Series: AT91SAM Smart ARMr
• Type: AT91 ARM Thumbr

Specifications of AT91EB63

• Contents: Evaluation Board, Cable, Power Jack, CD-ROM
• For Use With/related Products: AT91 63 & 43 Series
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Circuit Description
4.2.4
4.3
4.4
4.5
4-2
JTAG Interface
Memories
Power, Crystal
Oscillator and
Clock
Distribution
Push Buttons,
LEDs, Reset and
Serial Interfaces
An ARM-standard 20-pin box header (P2) is provided to enable connection of an ICE
interface to the JTAG inputs on the AT91. This allows code to be developed on the
board without using system resources such as memory and serial ports.
The schematic (Figure 6-2 in “Appendix B – Schematics”) shows one AT49BV1604
Mbyte, 16-bit Flash, one AT45DB161 2-Mbyte serial DataFlash, one AT24C512 64-
Kbyte EEPROM and two 128K/512K x 8 SRAM devices.
Note:
Strap E7 shown on this schematic is used to select the part of the1-Mbyte Flash that is
to be accessed. This is to enable users to Flash download a user-defined application
into the second part of the Flash and to boot from it.
The system clock is derived from a single 25 MHz crystal oscillator. This is divided by a
4-bit binary counter to give alternate clock frequencies of 25 MHz divided by 2, 4 or 8.
The system clock frequency is selected by fitting a jumper link in one position of the link
field (E8) and details of this can be found in Appendix A. One position in E8 selects an
external oscillator to be applied via the expansion bus interface.
Note:
The voltage regulator provides 3.3V to the board and lights the red POWER LED (DS9)
when operating. Power can be applied via the 2.1 mm connector to the regulator in
either polarity because of the diode-rectifying circuit. Another regulator allows the user
to power the AT91M63200 core 1.8V from the 3.3V voltage using the E5 strap.
When closed, the E15 strap allows the user to shut down the 3.3V regulator by simply
clearing the PA22 microcontroller PIO. A 100 µF capacitor powers this feature while
shut down. The board can be reactivated by pushing the S7 SMT push button.
The IRQ0, PB3, PB4 and PB5 switches are debounced and buffered.
A supervisory circuit has been included in the design to detect and, consequently, reset
the board when the 3.3V supply voltage drops below 3.08V. Note that this voltage can
be changed, depending on the board production series. The supervisory circuit also pro-
vides a debounced reset signal. This device can also generate the reset signal in case
of watchdog timeout as the pin NWDOVF of the AT91M63200 is connected on its input
MR.
Another supervisory circuit initializes separately the microcontroller embedded
JTAG/ICE interface when the 3.3V supply voltage drops below 3.08V. Note that this
voltage can be changed, depending on the board production series. These separated
reset lines allow the user to reset the board without resetting the JTAG/ICE interface
while debugging.
The schematic (Figure 6-4 in “Appendix B – Schematics”) also shows eight general-pur-
pose LEDs connected to Port B PIO pins (PB8 to PB15).
Two 9-way D-type connectors (J1/2) are provided for serial port connection.
Serial Port A (J2) is used primarily for host PC communication and is a DB9 female con-
nector. TXD and RXD are swapped so that a straight-through cable can be used. CTS
and RTS are connected together, as are DCD, DSR and DTR.
The AT91EB63 is fitted with two 128K x 8 SRAM devices.
The 4-bit binary counter is not fitted at the factory (this function is optional).
AT91EB63 Evaluation Board User Guide
2-