AD9742ACP-PCB Analog Devices Inc, AD9742ACP-PCB Datasheet - Page 17

• Manufacturer Part Number: AD9742ACP-PCB
• Description: BOARD EVAL FOR AD9742ACP
• Manufacturer: Analog Devices Inc
• Series: TxDAC®r

Specifications of AD9742ACP-PCB

• Rohs Status: RoHS non-compliant
• Number Of Dac's: 1
• Number Of Bits: 12
• Outputs And Type: 1, Differential
• Sampling Rate (per Second): 210M
• Data Interface: Parallel
• Settling Time: 11ns
• Dac Type: Current
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD9742

The differential circuit shown in Figure 33 provides the
necessary level shifting required in a single-supply system. In
this case, AVDD, which is the positive analog supply for both
the AD9742 and the op amp, is also used to level shift the
differential output of the AD9742 to midsupply (i.e., AVDD/2).
The AD8041 is a suitable op amp for this applicatio
SINGLE-ENDED, UNBUFFERED VOLTAGE OUTPUT
Figure 34 shows the AD9742 configured to provide a unipolar
output range of approximately 0 V to 0.5 V for a doubly termi-
nated 50 Ω cable since the nominal full-scale current, I
20 mA flows through the equivalent R
R
or IOUTB. The unused output (IOUTA or IOUTB) can be
connected to ACOM directly or via a matching R
values of I
compliance range is adhered to. One additional consideration in
this mode is the integral nonlinearity (INL), discussed in the
Analog Outputs section. For optimum INL performance, the
single-ended, buffered voltage output configuration is
suggested.
LOAD
AD9742
represents the equivalent load resistance seen by IOUTA
AD9742
IOUTA
IOUTB
Figure 33. Single-Supply DC Differential Coupled Circuit
OUTFS
IOUTA
IOUTB
Figure 34. 0 V to 0.5 V Unbuffered Voltage Output
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21
and R
25Ω
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21
I
OUTFS
LOAD
C
OPT
25Ω
= 20mA
can be selected as long as the positive
25Ω
225Ω
225Ω
50Ω
LOAD
1kΩ
of 25 Ω. In this case,
AD8041
V
500Ω
OUTA
50Ω
1kΩ
= 0V TO 0.5V
LOAD
n.
. Different
OUTFS
AVDD
, of
Rev. B | Page 17 of 32
SINGLE-ENDED, BUFFERED VOLTAGE OUTPUT
CONFIGURATION
Figure 35 shows a buffered single-ended output configuration
in which the op amp U1 performs an I-V conversion on the
AD9742 output current. U1 maintains IOUTA (or IOUTB) at a
virtual ground, minimizing the nonlinear output impedance
effect on the DAC’s INL performance as described in the
Analog Outputs section. Although this single-ended configura-
tion typically provides the best dc linearity performance, its ac
distortion performance at higher DAC update rates may be
limited by U1’s slew rate capabilities. U1 provides a negative
unipolar output voltage, and its full-scale output voltage is sim-
ply the product of R
set within U1’s voltage output swing capabilities by scaling I
and/or R
result with a reduced I
signal current.
POWER AND GROUNDING CONSIDERATIONS,
POWER SUPPLY REJECTION
Many applications seek high speed and high performance
under less than ideal operating conditions. In these application
circuits, the implementation and construction of the printed
circuit board is as important as the circuit design. Proper RF
techniques must be used for device selection, placement, and
routing as well as power supply bypassing and grounding to
ensure optimum performance. Figure 40 to Figure 43
illustrate the recommended printed circuit board ground,
power, and signal plane layouts implemented on the AD9742
evaluation board.
One factor that can measurably affect system performance is
the ability of the DAC output to reject dc variations or ac noise
superimposed on the analog or digital dc power distribution.
This is referred to as the power supply rejection ratio (PSRR).
For dc variations of the power supply, the resulting performance
of the DAC directly corresponds to a gain error associated with
the DAC’s full-scale current, I
is common in applications where the power distribution is gen-
erated by a switching power supply. Typically, switching power
supply noise will occur over the spectrum from tens of kHz to
several MHz. The PSRR versus frequency of the AD9742 AVDD
supply over this frequency range is shown in Figure 36.
AD9742
IOUTA
IOUTB
FB
. An improvement in ac distortion performance may
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Figure 35. Unipolar Buffered Voltage Output
I
OUTFS
FB
and I
OUTFS
= 10mA
200Ω
OUTFS
since U1 will be required to sink less
OUTFS
. The full-scale output should be
. AC noise on the dc supplies
200Ω
C
R
U1
OPT
FB
V
OUT
= I
AD9742
OUTFS
× R
OUTFS
FB