EM35X-DEV-UPG-IAR Ember, EM35X-DEV-UPG-IAR Datasheet - Page 223

• Manufacturer Part Number: EM35X-DEV-UPG-IAR
• Description: IAR EWARM LICENCE FOR EM35X
• Manufacturer: Ember
• Type: Licenser

Specifications of EM35X-DEV-UPG-IAR

• For Use With/related Products: EM35x
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 636-1028

17 Serial Wire and JTAG (SWJ) Interface
The EM35x includes a standard Serial Wire and JTAG (SWJ) Interface. The SWJ is the primary debug and
programming interface of the EM35x. The SWJ gives debug tools access to the internal buses of the EM35x,
and allows for non-intrusive memory and register access as well as CPU halt-step style debugging. Therefore,
any design implementing the EM35x should make the SWJ signals readily available.
Serial Wire is an ARM® standard, bi-directional, two-wire protocol designed to replace JTAG, and provides all
the normal JTAG debug and test functionality. JTAG is a standard five-wire protocol providing debug and test
functionality. In addition, the two Serial Wire signals (SWDIO and SWCLK) are overlaid on two of the JTAG
signals (JTMS and JTCK). This keeps the design compact and allows debug tools to switch between Serial Wire
and JTAG as needed, without changing pin connections.
While Serial Wire and JTAG offer the same debug and test functionality, Ember recommends Serial Wire.
Serial Wire uses only two pins instead of five, and offers a simple communication protocol, high performance
data rates, low power, built-in error detection, and protection from glitches.
The ARM® CoreSight
illustrated in Figure 17-1, the DAP includes two primary components: a debug port (the SWJ-DP) and an access
port (the AHB-AP). The SWJ-DP provides external debug access, while the AHB-AP provides internal bus
access. An external debug tool connected to the EM35x’s debug pins communicates with the SWJ-DP. The
SWJ-DP then communicates with the AHB-AP. Finally, the AHB-AP communicates on the internal bus.
Serial Wire and JTAG share five pins:
Note: The SWJ pins are forced functions, and their corresponding GPIO_PxCFGH/L configurations are
overridden when the EM35x resets. An application must disable all debug SWJ debug functionality to reclaim
any of the four SWJ GPIOs: PC0, PC2, PC3, and PC4.
Since these pins can be repurposed, refer to Chapter 1, Pin Assignments, and Section 7.3, Forced Functions, in
Chapter 7, GPIO, for complete pin descriptions and configurations.
For further information on the SWJ, contact Ember support for Application Notes and ARM
documentation.
JRST
JTDO
JTDI
SWDIO/JTMS
SWCLK/JTCK
pins
TM
Debug Access Port (DAP) comprises the Serial Wire and JTAG Interface (SWJ). As
SWJ-DP
select
Figure 17-1. SWJ Block Diagram
Final
17-1
interface
interface
JTAG
SWJ-DP
SW
SWJ-DAP
AP interface
Control and
AHB-AP
EM351 / EM357
AHB
®
CoreSight
120-035X-000G
TM