adf4218l Analog Devices, Inc., adf4218l Datasheet
adf4218l
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adf4218l Summary of contents
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... Analog Devices. Trademarks and registered trademarks are the property of their respective companies. ADF4217L/ADF4218L/ADF4219L GENERAL DESCRIPTION The ADF4217L/ADF4218L/ADF4219L are low power dual frequency synthesizers that can be used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. They can provide the LO for both the RF and IF sections ...
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... Parameter RF CHARACTERISTICS RF Input Frequency ( ADF4217L, ADF4218L ADF4217L, ADF4218L ADF4219L RF Input Sensitivity ADF4217L, ADF4218L ADF4219L IF Input Frequency ( ADF4217L/ADF4218L ADF4219L P = 16/17 ADF4219L P = 8/9 IF Input Sensitivity Maximum Allowable Prescaler 3 Output Frequency REFIN CHARACTERISTICS Reference Input Frequency Reference Input Sensitivity REFIN Input Capacitance ...
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... This includes relevant 16/32; IF /RF for ADF4218L, ADF4219L = 540 MHz/900 MHz The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20logN (where N is the N divider value). 8 The phase noise is measured with the EVAL-ADF421xEB1 Evaluation Board and the HP8562E Spectrum Analyzer. The spectrum analyzer provides the REFIN for the synthesizer ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADF4217L/ ADF4218L/ADF4219L feature proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
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... RF DGND ADF4217L ADF4218L AGND REF INTERNAL CONNECT REV. C ADF4217L/ADF4218L/ADF4219L PIN CONFIGURATIONS DGND INA IF 15 INB AGND DATA 12 CLK ...
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... This pin is not connected internally (ADF4219L only Complementary Input to the IF Prescaler. This point should be decoupled to the ground plane with a small bypass IN capacitor, typically 100 pF (ADF4217L/ADF4218L only Input to the IF Prescaler. This low level input signal is normally ac-coupled to the external VCO. IN ...
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... TPC 6. Phase Noise, IF Side (900 MHz, 200 kHz, 20 kHz) –7– ADF4217L/ADF4218L/ADF4219L 3V REFERENCE DD P – 4mA CP LEVEL = –11.2dBm PFD FREQUENCY = 200kHz –20 RES. BANDWIDTH = 1kHz VIDEO BANDWIDTH = 1kHz – ...
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... ADF4217L/ADF4218L/ADF4219L 3V, V REFERENCE DD –10 LEVEL = –4.2dBm I = 4.0mA CP PFD FREQUENCY = 200kHz –20 LOOP BANDWIDTH = 20kHz RES. BANDWIDTH = 10kHz –30 VIDEO BANDWIDTH = 10kHz SWEEP = 1.9 SECONDS –40 AVERAGES = 20 –50 –60 –70 –80 –90 –100 –400kHz –200kHz 900MHz FREQUENCY TPC 7. Reference Spurs, IF Side ...
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... The prescaler is selectable. On the IF side, it can be set to either 8/9 (DB20 of the IF AB Counter Latch set 16/17 (DB20 set to 1). On the RF side of the ADF4217L/ADF4218L, it can be set to 64/65 or 32/33. On the ADF4219L, the RF prescaler can be set to 16/17 or 32/33. See Tables V, VI, VIII, and IX. ...
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... The main blocks include a 22-bit input shift register, a 14-bit R counter, and an N counter. The N counter is comprised of a 6-bit A counter and an 11-bit B counter for the ADF4217L and the ADF4218L. The 18-bit N counter on the ADF4219L is comprised of a 13-bit B counter and a 5-bit A counter. Data V ...
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... Table II. ADF4217L/ADF4218L Family Latch Summary DB21 DB20 DB19 DB18 DB17 DB16 DB21 DB20 DB19 DB18 DB17 DB16 P7 P6 B11 B10 B9 B8 DB21 DB20 DB19 DB18 DB17 DB16 P12 P11 P10 P13 P9 DB21 DB20 DB19 DB18 DB17 DB16 P16 P14 ...
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... ADF4217L/ADF4218L/ADF4219L DB21 DB20 DB19 DB18 DB17 DB16 R15 DB21 DB20 DB19 DB18 DB17 DB16 P7 P6 B13 B12 B11 B10 DB21 DB20 DB19 DB18 DB17 DB16 P13 P12 P11 P10 P9 R15 DB21 DB20 DB19 DB18 DB17 DB16 P16 P14 B13 ...
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... Table IV. ADF4217L/ADF4218L/ADF4219L IF Reference Counter Latch Map DB21 DB20 DB19 DB18 DB17 DB16 R15 P1 PD POLARITY 0 NEGATIVE 1 POSITIVE 1.0mA 1 4.0mA CHARGE PUMP P2 OUTPUT 0 NORMAL 1 THREE-STATE P12 P11 P4 FROM RF R LATCH ...
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... ADF4217L/ADF4218L/ADF4219L Table V. ADF4217L/ADF4218L IF AB Counter Latch Map DB21 DB20 DB19 DB18 DB17 DB16 P7 P6 B11 B10 B9 B8 B11 B10 PRESCALER 0 8/9 1 16/ SECTION 0 NORMAL OPERATION 1 POWER-DOWN IF AB COUNTER LATCH ...
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... P6 IF PRESCALER 0 8/9 1 16/ SECTION 0 NORMAL OPERATION 1 POWER-DOWN REV. C ADF4217L/ADF4218L/ADF4219L Table VI. ADF4219L IF AB Counter Latch Map IF AB COUNTER LATCH 13-BIT B COUNTER DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 ...
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... ADF4217L/ADF4218L/ADF4219L DB21 DB20 DB19 DB18 DB17 DB16 P12 P11 P10 P13 P9 R15 P9 PD POLARITY 0 NEGATIVE 1 POSITIVE I P13 CP 0 1.0mA 1 4.0mA CHARGE PUMP P10 OUTPUT 0 NORMAL 1 THREE-STATE P4 P12 P11 FROM RF R LATCH ...
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... Table VIII. ADF4217L/ADF4218L RF AB Counter Latch Map DB21 DB20 DB19 DB18 DB17 DB16 P16 P14 B11 B10 B9 B8 B11 B10 PRESCALER RF PRESCALER P14 ADF4217L ADF4218L 0 64/65 32/33 1 32/33 64/65 P16 RF SECTION ...
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... ADF4217L/ADF4218L/ADF4219L DB21 DB20 DB19 DB18 DB17 DB16 P16 P14 B13 B12 B11 B10 B13 B12 B11 P14 IF PRESCALER 0 16/17 1 32/33 P16 IF SECTION 0 NORMAL OPERATION 1 POWER-DOWN Table IX. ADF4219L RF AB Counter Latch Map ...
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... CP Programmable IF AB Counter If control bits C2, C1 are 0, 1, the data in the input register is used to program the IF AB counter. For the ADF4217L/ADF4218L, the AB counter consists of a 6-bit swallow counter (A counter) and 11-bit programmable counter (B counter). Table V shows the input register data format for programming the IF AB counter and the possible divide ratios ...
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... CP Programmable RF AB Counter If control bits C2, C1 are 1, 1, the data in the input register is used to program the RF AB counter. For the ADF4217L/ADF4218L, the AB counter consists of a 6-bit swallow counter (A counter) and 11-bit programmable counter (B counter). Table VIII shows the input register data format for programming the RF AB counter and the possible divide ratios ...
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... REF MHz TCXO (temperature controlled crystal IN oscillator). INTERFACING The ADF4217L/ADF4218L/ADF4219L family has a simple ® SPI compatible serial interface for writing to the device. SCLK, SDATA, and LE control the data transfer. When LE (latch enable) goes high, the 22 bits that have been clocked into the input register on each rising edge of SCLK will get transferred to the appropriate latch ...
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... ADF4217L/ADF4218L/ADF4219L 20-Lead Thin Shrink Small Outline Package [TSSOP] PIN 1 0.15 0.05 COPLANARITY 0.10 4.50 BSC TOP VIEW PIN 1 INDEX AREA 1 24 BOTTOM VIEW OUTLINE DIMENSIONS (RU-20) Dimensions shown in millimeters 6.60 6.50 6. 4.50 4.40 4.30 6.40 BSC 1 10 0.65 1.20 BSC MAX 0.20 0.09 8 0.30 0 0.19 SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-153AC 24-Leadless Chip Array CASON [LGA] ...
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... Change to TPC Change to OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7/02—Data Sheet changed from REV REV. B. Change to ADF4219L SENSITIVITY SPECIFICATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6/02—Data Sheet changed from REV REV. A. Changes to FUNCTIONAL BLOCK DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Changes to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Changes to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Changes to CASON package drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 REV. C ADF4217L/ADF4218L/ADF4219L –23– Page ...
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