cy2292 Cypress Semiconductor Corporation., cy2292 Datasheet

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cy2292

Manufacturer Part Number
cy2292
Description
Three-pll General-purpose Eprom Programmable Clock Generator
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Cypress Semiconductor Corporation
Document #: 38-07449 Rev. *C
Features
Selector Guide
CY2292
CY2292I
CY2292F
CY2292FI
CY2292FZ
• Three integrated phase-locked loops
• EPROM programmability
• Factory-programmable (CY2292) or field-program-
• Low-skew, low-jitter, high-accuracy outputs
• Power-management options (Shutdown, OE, Suspend)
• Frequency select option
• Smooth slewing on CPUCLK
• Configurable 3.3V or 5V operation
• 16-pin SOIC Package (TSSOP: F only)
Part Number
Logic Block Diagram
mable (CY2292F) device options
Outputs
6
6
6
6
6
10 MHz–25 MHz (external crystal)
1 MHz–30 MHz (reference clock)
10 MHz–25 MHz (external crystal)
1 MHz–30 MHz (reference clock)
10 MHz–25 MHz (external crystal)
1 MHz–30 MHz (reference clock)
10 MHz–25 MHz (external crystal)
1 MHz–30 MHz (reference clock)
10 MHz–25 MHz (external crystal)
1 MHz–30 MHz (reference clock)
S2/SUSPEND
SHUTDOWN/
XTALOUT
Input Frequency Range
XTALIN
S0
S1
OE
EPROM Programmable Clock Generator
.
OSC.
3901 North First Street
(10 BIT)
(8 BIT)
(8 BIT)
CPLL
UPLL
SPLL
76.923 kHz–100 MHz (5V)
76.923 kHz–80 MHz (3.3V)
76.923 kHz–90 MHz (5V)
76.923 kHz–66.6 MHz (3.3V)
76.923 kHz–90 MHz (5V)
76.923 kHz–66.6 MHz (3.3V)
76.923 kHz–80 MHz (5V)
76.923 kHz–60.0 MHz (3.3V)
76.923 kHz–90 MHz (5V)
76.923 kHz–66.6 MHz (3.3V)
Benefits
/1,2,4,8
/1,2,3,4,5,6
/8,10,12,13
/20,24,26,40
/48,52,96,104
• Generates up to three custom frequencies from
• Easy customization and fast turnaround
• Programming support available for all opportunities
• Meets critical industry standard timing requirements
• Supports low-power applications
• Eight user-selectable frequencies on CPU PLL
• Allows downstream PLLs to stay locked on CPUCLK
• Enables application compatibility
• Industry-standard packaging saves on board space
Output Frequency Range
/1,2,4
external sources
output
Three-PLL General-Purpose
CONFIG
EPROM
San Jose
,
CA 95134
Factory Programmable
Commercial Temperature
Factory Programmable
Industrial Temperature
Field Programmable
Commercial Temperature
Field Programmable
Industrial Temperature
Field Programmable
Commercial Temperature
Revised Sept. 07, 2005
XBUF
CPUCLK
CLKD
CLKA
CLKB
CLKC
Specifics
408-943-2600
CY2292
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cy2292 Summary of contents

Page 1

... Features • Three integrated phase-locked loops • EPROM programmability • Factory-programmable (CY2292) or field-program- mable (CY2292F) device options • Low-skew, low-jitter, high-accuracy outputs • Power-management options (Shutdown, OE, Suspend) • Frequency select option • Smooth slewing on CPUCLK • Configurable 3. operation • 16-pin SOIC Package (TSSOP: F only) ...

Page 2

... Float XTALOUT pin if XTALIN is driven by reference clock (as opposed to crystal). 3. Please refer to application note “Understanding the CY2291, CY2292 and CY2295” for more information. 4. The CY2292 has weak pull-downs on all outputs. Hence, when a three-state condition is forced on the outputs, the output pins are pulled LOW. Document #: 38-07449 Rev. *C ...

Page 3

... Once the custom request has been processed you will receive a part number with a 3-digit extension (e.g., CY2292SC-128) specific to the frequencies and pinout of your device. This will be the part number used for samples requests and production orders ...

Page 4

... Except crystal pins Except crystal pins – 0. +0.5V IN Three-state outputs Max., 3.3V operation DD DD [10] Shutdown active CY2292/CY2292F / connected to the Xout pin +2•F )+0.27•(F +F CPLL UPLL SPLL CLKA CLKB CY2292 Min. Max. Unit 4.5 5.5 3.0 3.6 °C ...

Page 5

... Except crystal pins Except crystal pins – 0. +0.5V IN Three-state outputs Max., 5V operation DD DD Shutdown active CY2292I/CY2292FI Conditions Except crystal pins Except crystal pins – 0. +0.5V IN Three-state outputs Max., 3.3V operation ...

Page 6

... MHz [13] [13] [3, 12, 14] max. – t min.), 9A 9A < 4 MHz) OUT max. – t min < 16 MHz) OUT < 50 MHz) OUT > 50 MHz) OUT CY2292 CY2292F CY2292 Min. Typ. Max. Unit <0 <0 <400 500 ps <250 350 ps < <0. ...

Page 7

... MHz) OUT max. – t min < 16 MHz) OUT < 50 MHz) OUT > 50 MHz) OUT CY2292I CY2292FI Description CY2292I CY2292FI [12] ÷ [12] ÷ [13] [13] [3, 12, 14] CY2292 Min. Typ. Max. Unit 11.1 13000 ns (90 MHz) (76 ...

Page 8

... MHz) OUT < 50 MHz) OUT > 50 MHz) CY2292I CY2292FI NEW SELECT STABLE t & new CY2292 Min. Typ. Max. Unit < 0 < 0 < 400 500 ps < 250 350 ps < < 0. 66.6 MHz ...

Page 9

... SOIC – Tape and Reel CY2292SXL–XXX 16-Pin SOIC CY2292SXL–XXXT 16-Pin SOIC – Tape and Reel CY2292FXC 16-Pin SOIC CY2292FXCT 16-Pin SOIC – Tape and Reel CY2292SXI–XXX 16-Pin SOIC CY2292SXI–XXXT 16-Pin SOIC – Tape and Reel CY2292FXI ...

Page 10

... Z16.173 ZZ16.173 LEAD FREE PKG. 0.25[0.010] 1.10[0.043] MAX. BSC GAUGE 0°-8° PLANE 0.076[0.003] SEATING PLANE CY2292 MAX. PART # S16.15 STANDARD PKG. SZ16.15 LEAD FREE PKG. 0.010[0.254] X 45° 0.016[0.406] 0.0075[0.190] 0.016[0.406] 0.0098[0.249] 0.035[0.889] 51-85068-*B MAX ...

Page 11

... Document History Page Document Title: CY2292 Three-PLL General-Purpose EPROM Programmable Clock Generator Document Number: 38-07449 REV. ECN NO. Issue Date ** 116993 07/01/02 *A 119639 12/05/02 *B 277130 See ECN *C 395808 See ECN Document #: 38-07449 Rev. *C Orig. of Change Description of Change DSG Changed from Spec number: 38-00946 to 38-07449 ...

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