ICS2008BV IDT, Integrated Device Technology Inc, ICS2008BV Datasheet

IC TIME CODE RCVR/GEN 44-PLCC

ICS2008BV

Manufacturer Part Number
ICS2008BV
Description
IC TIME CODE RCVR/GEN 44-PLCC
Manufacturer
IDT, Integrated Device Technology Inc
Type
SMPTE Time Code Receiver, Generatorr
Datasheet

Specifications of ICS2008BV

Applications
Multimedia
Mounting Type
Surface Mount
Package / Case
44-PLCC
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Package Type
PLCC
Mounting
Surface Mount
Pin Count
44
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
2008BV

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Block Diagram
General Description
The ICS2008B, SMPTE Time Code Receiver / Generator
chip, is a VLSI device designed in a low power CMOS
process. This device provides the timing coordination for
Multimedia sight and sound events. Although it is aimed at
a PC Multimedia environment, the ICS2008B is easily
integrated into products requiring SMPTE time code
generation and/or reception in LTC (Longitudinal Time
Code) and/or VITC (Vertical Interval Time Code) formats
and MTC (MIDI Time Code) translation.
Taking its input from composite video, S-Video, or an
audio track, the ICS2008B can read SMPTE time code in
VITC and LTC formats. Time code output formats are LTC
and VITC. All are available simultaneously. A UART is
provided for the user to support MTC or tape transport
control.
The processor interface is compatible with the IBM PC and
ISA bus compatible computers and is easily interfaced to
other processors and micro-controllers.
The ICS2008B is an improved version of the ICS2008,
with additional features and capabilities.
ICS2008 ICS2008B 2008 2008B
SMPTE Time Code Receiver/Generator
ICS2008B Rev G 5/13/10
Integrated
Circuit
Systems, Inc.
ICS reserves the right to make changes in the device data identified in this publication without
further notice. ICS advises its customers to obtain the latest version of all device data to verify
that any information being relied upon by the customer is current and accurate.
Features
• Meets SMPTE VITC Specifications
• Meets SMPTE and EBU LTC Specifications
• Time Code Burn-in Window
• LTC edge rate control
• Internal and external sync sources
• LTC and VITC Generators
• LTC Receiver
• VITC Receiver
• New UART frequency of 38.4 K for tape transport control
– Programmable position, size and character attributes
– Conforms to EBU T
– Genlock to video or house sync inputs
– Improved video timing lock during VCR pause and
– Internally generated timing from oscillator input
– External click input
– Internal Timer
– Real Time SMPTE Rates:
– Time Code Modes
– VITC can be inserted on two lines from 10-40
– Jam Sync, freewheeling, error bypass/correction,
– Synchronize bit rates from 1/30
– Reads code from any or all selected scan lines.
– VITC search mode, will search through VBI lines until
Allows 1/4 Frame MIDI Time Code Messages
30 Hz, 29.97 Hz, 25 Hz, 24 Hz
Drop Frame and Color Frame
(SMPTE specifies lines 10-20)
VITC is found.
shuttle modes
and plus-one-frame capability
nominal playback speed.
r
and T
f
Specifications
th
nominal to 80X
ICS2008B

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ICS2008BV Summary of contents

Page 1

Integrated Circuit Systems, Inc. SMPTE Time Code Receiver/Generator General Description The ICS2008B, SMPTE Time Code Receiver / Generator chip VLSI device designed in a low power CMOS process. This device provides the timing coordination for Multimedia sight and ...

Page 2

ICS2008B Package Pinouts LTCOUT 1 LFC 2 XTAL2 3 XTAL1 4 AVDD 5 AVSS 6 COUT 7 YOUT ...

Page 3

Pin Descriptions PIN NUMBER PIN NAME TQFP PLCC 12, 10 18, 16 Y1, Y2 11, 9 17 DTHRESH 13 19 STHRESH 14 20 CTHRESH OUT OUT 41 3 FRAME ...

Page 4

ICS2008B Functional Description The following is a functional description of the hardware regis- ters in the ICS2008B chip. It also describes how those registers can be utilized by the software to facilitate specific application services. Hardware Environments The ICS2008B operates ...

Page 5

UART A general purpose UART is provided for MIDI, video trans- port control, etc. Most serial interface transport controls use 9600 and 38.4K BAUD. The CTS and RTS modem controls are needed in these applications. MIDI ports use 31.25K BAUD, ...

Page 6

ICS2008B The SMPTE Status Register is a read only register which contains video and LTC status SMPTE1 SMPTE Status Register FRAMEIN (input = 1-high, 0-low) CLICK (input = 1-high, 0-low) LTCLOCK (1-locked, ...

Page 7

VITC Read 1 Registers IR10-IR17 (read-only) These read only registers contain the VITC data as received from the video line selected in IR30. The frame is stored with VITC bit 2 in the LSB of IR10 and VITC bit 80 ...

Page 8

ICS2008B VITC Read Line Select Registers IR30-IR31 IR30 VITC Read Line 1 Read Line 10-40 (N+10) CRCERR (1-error, 0-OK) (r/o) NOCODE (1-no code, 0-code) (r/o) VITC Read Enable (1-enable ...

Page 9

PAL/NTSC — When set to one, this bit causes the video to be synchronized with PAL timing. Otherwise, when cleared to zero, video is synchronized with NTSC timing. Video Interrupt Line Register IR33 This register selects the video line after ...

Page 10

ICS2008B Timer Control Registers IR3C & IR3D These two registers control the interrupt timer. It should be noted that IR3C is a write only register, while IR3D is a read/ write register ...

Page 11

Indirect Register Map 7 6 LTC 00 BINARY GROUP 1 Read 01 BINARY GROUP 2 02 BINARY GROUP 3 03 BINARY GROUP 4 04 BINARY GROUP 5 05 BINARY GROUP 6 06 BINARY GROUP 7 07 BINARY GROUP 8 LTC ...

Page 12

ICS2008B UART Registers The UART emulates a 6850. Since the UART is tailored to MIDI applications, some of the generic 6850 functions have been omitted. The registers described below reflect that. The two UART registers, Command/Status and Data, are accessible ...

Page 13

Absolute Maximum Ratings Operating Temperature . . . . . . . . . . . . . . . . . . 0°C to +70°C Storage Temperature . . . . . . . . . . . . ...

Page 14

ICS2008B AC Electrical Characteristics = 5V ± 10%; GND = 0°C to +70° PARAMETER Address setup to IOR* or IOW* command Address hold from IOR* or IOW* command Read pulse width Access time Output ...

Page 15

Applications Crystal Oscillator This oscillator will operate properly with either a serial or parallel resonant crystal. If fre- quency accuracy is critical, a parallel resonant crystal is recommended. Fig Crystal Oscillator Threshold Bypass Pins These pins provide access ...

Page 16

ICS2008B Programming The ICS2008B is a SMPTE time code input/output device with a UART which can be used as a MIDI UART or transport control UART. All of the time critical functions to read and gen- erate time code are ...

Page 17

Reading VITC To read VITC code one must first setup IR30 thru IR33. The VITC Read Line registers, IR30 and IR31, select the video line from which VITC code read. The MSB is the en- able for ...

Page 18

ICS2008B PLCC 44-PIN PACKAGE All Dimensions in Inches ICS2008B ...

Page 19

TQFP 44-PIN PACKAGE All dimensions in Millimeters -HD VERSION HEAT SLUG DOWN ...

Page 20

... Revised PLCC and TQFP Package Diagrams and dimensions (page 18 & 19) Rev F Added EOL note for ordering information per PDN U-09-01. Rev G removed green parts per PDN U-09-01 Ordering Information ICS2008BVLF ICS2008BY-10LFT ICS2008BVLFT ICS2008B 2008BVLF 44 Pin TQFP 2008BY-10LF Lead Free Pin PLCC, ICS2008BVLF Lead Free Tape and Reel Tape and Reel ...

Page 21

Integrated Circuit Systems, Inc. Corporate Headquarters:2435 Boulevard of the Generals P.O. Box 968 Valley Forge, PA 19482-0968 Telephone: Fax: San Jose Operations: 525 Race Street San Jose, CA 95126-3448 Telephone: Fax: Web Site: http://www.icst.com 610-630-5300 610-630-5399 408-297-1201 408-925-9460 21 ICS2008B ...

Page 22

Figure 8 “Self Biased Inputs” Diagram on page 15: a) VDD/2 should be VDD should be 35K 2. Add the following notes called “AC Coupling of Internally-Biased Inputs” after “Self Biased Inputs” section on page 15. AC ...

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