IDT70V08 Integrated Device Technology, IDT70V08 Datasheet
IDT70V08
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IDT70V08 Summary of contents
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... Integrated Device Technology, Inc. HIGH-SPEED 3.3V 64K x 8 DUAL-PORT STATIC RAM ◆ ◆ ◆ ◆ ◆ IDT70V08 easily expands data bus width to 16 bits or more using the Master/Slave select when cascading more than one device for BUSY output flag on Master, ◆ ◆ ◆ ◆ ◆ ...
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... IDT70V08S/L High-Speed 3.3.V 64K x 8 Dual-Port Static RAM Description The IDT70V08 is a high-speed 64K x 8 Dual-Port Static RAM. The IDT70V08 is designed to be used as a stand-alone 512K-bit Dual-Port RAM combination MASTER/SLAVE Dual-Port RAM for 16-bit- or-more word system. Using the IDT MASTER/SLAVE Dual-Port ...
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... IDT70V08S/L High-Speed 3.3V 64K x 8 Dual-Port Static RAM Absolute Maximum Ratings Symbol Rating (2) V Terminal Voltage TERM with Respect to GND T Temperature BIAS Under Bias T Storage STG Temperature I DC Output OUT Current NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device ...
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... IDT70V08S/L High-Speed 3.3.V 64K x 8 Dual-Port Static RAM Truth Table I – Chip Enable < 0. >V -0.2V CC (3) X NOTES: 1. Chip Enable references are shown above with the actual and ' CMOS standby requires ' either < 0.2V or >V Truth Table II – Non-Contention Read/Write Control ...
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... IDT70V08S/L High-Speed 3.3V 64K x 8 Dual-Port Static RAM DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range Symbol Parameter ( Input Leakage Current Output Leakage Current LO V Output Low Voltage OL V Output High Voltage OH NOTES: < 2.0V, input leakages are undefined. ...
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... IDT70V08S/L High-Speed 3.3.V 64K x 8 Dual-Port Static RAM DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range Symbol Parameter I Dynamic Operating Current DD (Both Ports Active) I Standby Current SB1 (Both Ports - TTL Level Inputs) I Standby Current SB2 (One Port - TTL Level Inputs) ...
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... IDT70V08S/L High-Speed 3.3V 64K x 8 Dual-Port Static RAM AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range Symbol READ CYCLE t Read Cycle Time RC t Address Access Time AA (3) t Chip Enable Access Time ACE t Output Enable Access Time AOE t Output Hold from Address Change ...
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... IDT70V08S/L High-Speed 3.3.V 64K x 8 Dual-Port Static RAM Waveform of Read Cycles ADDR ( R/W DATA OUT BUSY OUT NOTES: 1. Timing depends on which signal is asserted last CE. 2. Timing depends on which signal is de-asserted first CE or OE. delay is required only in cases where the opposite port is completing a write operation to the same address location. For simultaneous read operations BUSY has no 3 ...
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... IDT70V08S/L High-Speed 3.3V 64K x 8 Dual-Port Static RAM AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Symbol WRITE CYCLE t Write Cycle Time WC (3) t Chip Enable to End-of-Write EW t Address Valid to End-of-Write AW (3) t Address Set-up Time AS t Write Pulse Width WP t Write Recovery Time ...
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... IDT70V08S/L High-Speed 3.3.V 64K x 8 Dual-Port Static RAM Timing Waveform of Write Cycle No. 1, R/W Controlled Timing ADDRESS OE (9,10 SEM ( R/W DATA OUT DATA IN Timing Waveform of Write Cycle No Controlled Timing ADDRESS CE or SEM (9,10) ( R/W DATA IN NOTES must be HIGH during all address transitions. ...
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... IDT70V08S/L High-Speed 3.3V 64K x 8 Dual-Port Static RAM Timing Waveform of Semaphore Read after Write Timing, Either Side VALID ADDRESS t AW SEM I R/W OE NOTES for the duration of the above timing (both write and read cycle) (Refer to Chip Enable Truth Table). ...
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... IDT70V08S/L High-Speed 3.3.V 64K x 8 Dual-Port Static RAM AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range Symbol BUSY TIMING (M/S BUSY Access Time from Address Match t BAA BUSY Disable Time from Address Not Matched t BDA BUSY Access Time from Chip Enable Low ...
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... IDT70V08S/L High-Speed 3.3V 64K x 8 Dual-Port Static RAM Timing Waveform of Write with Port-to-Port Read and BUSY (M ADDR "A" R/W "A" DATA IN "A" (1) t APS ADDR "B" BUSY "B" DATA OUT "B" NOTES ensure that the earlier of the two ports wins ...
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... IDT70V08S/L High-Speed 3.3.V 64K x 8 Dual-Port Static RAM Waveform of BUSY Arbitration Controlled by CE Timing (M ADDR "A" and "B" CE "A" (2) t APS CE "B" BUSY "B" Waveform of BUSY Arbitration Cycle Controlled by Address Match Timing (M (1) IH ADDR "A" t APS ADDR " ...
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... IDT70V08S/L High-Speed 3.3V 64K x 8 Dual-Port Static RAM AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range Symbol INTERRUPT TIMING t Address Set-up Time AS t Write Recovery Time WR t Interrupt Set Time INS t Interrupt Reset Time INR Symbol INTERRUPT TIMING t Address Set-up Time ...
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... IDT70V08S/L High-Speed 3.3.V 64K x 8 Dual-Port Static RAM Waveform of Interrupt Timing ADDR "A" CE "A" R/W "A" INT "B" ADDR "B" CE "B" OE "B" INT "B" NOTES: 1. All timing is the same for left and right ports. Port “A” may be either the left or right port. Port “B” is the port opposite from port “A”. ...
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... NOTES: 1. Pins BUSY and BUSY are both outputs when the part is configured as a master. Both are inputs when configured as a slave. BUSY outputs on the IDT70V08 are push pull, not open drain outputs. On slaves the BUSY input internally inhibits writes. 2. "L" if the inputs to the opposite port were stable prior to the address and enable inputs of this port. "H" if the inputs to the opposite port became stable after the address and is not met, either BUSY enable inputs of this port ...
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... BUSY signal as a write inhibit signal. Thus on the IDT70V08 RAM the BUSY pin is an output if the part is used and the BUSY pin is an input if the part used master (M/S pin = V ...
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... The eight semaphore flags reside within the IDT70V08 in a separate memory space from the Dual-Port RAM. This address space is accessed by placing a low input on the SEM pin (which acts as a chip ...
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... IDT70V08S/L High-Speed 3.3.V 64K x 8 Dual-Port Static RAM Ordering Information IDT XXXXX A 999 Device Power Speed Type NOTE: 1. Industrial temperature range is available. For other speeds, packages and powers contact your sales office. Datasheet Document History: 3/15/99: Initiated datasheet document history Converted to new format ...