IDT70V18L15PFI IDT [Integrated Device Technology], IDT70V18L15PFI Datasheet
IDT70V18L15PFI
Related parts for IDT70V18L15PFI
IDT70V18L15PFI Summary of contents
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True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed access – Commercial: 15/20ns (max.) – Industrial: 20ns (max.) Low-power operation – IDT70V18L Active: 440mW (typ.) Standby: 660µW (typ.) Dual chip enables allow for depth expansion ...
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IDT70V18L High-Speed 3.3V 64K x 9 Dual-Port Static RAM The IDT70V18 is a high-speed 64K x 9 Dual-Port Static RAM. The IDT70V18 is designed to be used as a stand-alone 576K-bit Dual-Port RAM combination MASTER/SLAVE Dual-Port RAM ...
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IDT70V18L High-Speed 3.3V 64K x 9 Dual-Port Static RAM Left Port Right Port Chip Enables R/W R/W Read/Write Enable Output Enable ...
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IDT70V18L High-Speed 3.3V 64K x 9 Dual-Port Static RAM < 0. >V -0.2V CC (3) X NOTES: 1. Chip Enable references are shown above with the actual CE 2. 'H' ...
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IDT70V18L High-Speed 3.3V 64K x 9 Dual-Port Static RAM Symbol Parameter ( Input Leakage Current Output Leakage Current LO V Output Low Voltage OL V Output High Voltage OH NOTES: < Vcc 2.0V, ...
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IDT70V18L High-Speed 3.3V 64K x 9 Dual-Port Static RAM Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load ADDR ( R/W DATA OUT BUSY OUT CE ( NOTES: ...
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IDT70V18L High-Speed 3.3V 64K x 9 Dual-Port Static RAM Symbol READ CYCLE t Read Cycle Time RC t Address Access Time AA (3) t Chip Enable Access Time ACE t Output Enable Access Time AOE t Output Hold from Address ...
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IDT70V18L High-Speed 3.3V 64K x 9 Dual-Port Static RAM ADDRESS OE (9,10 SEM ( R/W DATA OUT DATA IN ADDRESS (9,10 SEM ( DATA IN NOTES ...
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IDT70V18L High-Speed 3.3V 64K x 9 Dual-Port Static RAM VALID ADDRESS SEM I R/W OE NOTES for the duration of the above timing (both write and read cycle) ...
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IDT70V18L High-Speed 3.3V 64K x 9 Dual-Port Static RAM Symbol BUSY TIMING (M/S BUSY Access Time from Address Match t BAA BUSY Disable Time from Address Not Matched t BDA BUSY Access Time from Chip Enable Low t ...
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IDT70V18L High-Speed 3.3V 64K x 9 Dual-Port Static RAM ADDR "A" R/W "A" DATA IN "A" (1) t APS ADDR "B" BUSY "B" DATA OUT "B" NOTES ensure that the earlier of the two ports wins ...
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IDT70V18L High-Speed 3.3V 64K x 9 Dual-Port Static RAM BUSY ADDR "A" and "B" CE "A" (2) t APS CE "B" BUSY "B" BUSY S ADDR "A" t APS ADDR "B" BUSY "B" NOTES: 1. All timing is the same ...
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IDT70V18L High-Speed 3.3V 64K x 9 Dual-Port Static RAM ADDR "A" CE "A" "A" INT "B" ADDR "B" CE "B" OE "B" INT "B" NOTES: 1. All timing is the same for left and right ports. Port “A” ...
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IDT70V18L High-Speed 3.3V 64K x 9 Dual-Port Static RAM BUSY Inputs Outputs 15L CE CE BUSY ( 15R MATCH MATCH MATCH H ...
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IDT70V18L High-Speed 3.3V 64K x 9 Dual-Port Static RAM Busy Logic provides a hardware indication that both ports of the RAM have accessed the same location at the same time. It also allows one of the two accesses to proceed ...
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IDT70V18L High-Speed 3.3V 64K x 9 Dual-Port Static RAM verifies its success in setting the latch by reading it was successful, it proceeds to assume control over the shared resource was not successful in setting the ...
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... Device Power Speed Package Type NOTE: 1. Contact your sales office for Industrial Temperature range in other speeds, packages and powers. "PRELIMINARY' datasheets contain descriptions for products that are in early release. 9/30/99: Initial Public Offering 11/10/99: Page 1 & 17 Replaced IDT logo 4/10/00: Page 2 Fixed incorrect pin number ...