IDT72V81 IDT [Integrated Device Technology], IDT72V81 Datasheet

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IDT72V81

Manufacturer Part Number
IDT72V81
Description
3.3 Volt CMOS DUAL ASYNCHRONOUS FIFO DUAL 512 x 9, DUAL 1,024 x 9 DUAL 2,048 x 9, DUAL 4,096 X 9
Manufacturer
IDT [Integrated Device Technology]
Datasheet

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WA
RA
1999
The IDT72V81 is equivalent to two IDT72V01 - 512 x 9 FIFOs
The IDT72V82 is equivalent to two IDT72V02 - 1,024 x 9 FIFOs
The IDT72V83 is equivalent to two IDT72V03 - 2,048 x 9 FIFOs
The IDT72V84 is equivalent to two IDT72V04 - 4,096 x 9 FIFOs
The IDT72V85 is equivalent to two IDT72V05 - 8,192 x 9 FIFOs
Low power consumption
— Active: 330 mW (max.)
— Power-down: 18 mW (max.)
Ultra high speed—15 ns access time
Asynchronous and simultaneous read and write
Offers optimal combination of data capacity, small foot print
and functional flexibility
Ideal for bidirectional, width expansion, depth expansion, bus-
matching, and data sorting applications
Status Flags: Empty, Half-Full, Full
Auto-retransmit capability
High-performance CEMOS™ technology
Space-saving TSSOP package
Industrial temperature range (–40 C to +85 C) is available
Integrated Device Technology, Inc.
XIA
CONTROL
CONTROL
WRITE
READ
EXPANSION
LOGIC
LOGIC
FLAG
XOA/HFA
POINTER
WRITE
FFA
BUFFERS
THREE-
STATE
EFA
3.3 Volt CMOS DUAL ASYNCHRONOUS FIFO
DUAL 512 x 9, DUAL 1,024 x 9
DUAL 2,048 x 9, DUAL 4,096 X 9
DUAL 8,192 X 9
DATA INPUTS
(DA
OUTPUTS
(QA
ARRAY A
1,024 x 9
2,048 x 9
4,096 x 9
8,192 x 9
512 x 9
DATA
0
RAM
-DA
0
-QA
8
)
8
)
POINTER
READ
FLA/RTA
RESET
LOGIC
RSA
1
load and empty data on a first-in/first-out basis. These devices are functional and
compatible to two IDT72V01/72V02/72V03/72V04/72V05 FIFOs in a single
package with all associated control, data, and flag lines assigned to separate
pins. The devices use Full and Empty flags to prevent data overflow and
underflow and expansion logic to allow for unlimited expansion capability in both
word size and depth.
pointers, with no address information required to load and unload data. Data
is toggled in and out of the devices through the use of the Write (W) and Read
(R) pins.
bits at the user’s option. This feature is especially useful in data communications
applications where it is necessary to use a parity bit for transmission/reception
error checking. It also features a Retransmit (RT) capability that allows for reset
of the read pointer to its initial position when RT is pulsed low to allow for
retransmission from the beginning of data. A Half-Full Flag is available in the
single device mode and width expansion modes.
They are designed for those applications requiring asynchronous and simul-
taneous read/writes in multiprocessing and rate buffer applications.
RB
The IDT72V81/72V82/72V83/72V84/72V85 are dual-FIFO memories that
The reads and writes are internally sequential through the use of ring
The devices utilize a 9-bit wide data array to allow for control and parity
These FIFOs are fabricated using IDT’s high-speed CMOS technology.
WB
XIB
CONTROL
CONTROL
WRITE
READ
EXPANSION
LOGIC
LOGIC
FLAG
XOB/HFB
POINTER
WRITE
FFB
BUFFERS
THREE-
STATE
EFB
DATA INPUTS
(DB
OUTPUTS
(QB
ARRAY A
1,024 x 9
2,048 x 9
4,096 x 9
8,192 x 9
DATA
512 x 9
0
RAM
0
-DB
-QB
8
8
)
)
POINTER
IDT72V81
IDT72V82
IDT72V83
IDT72V84
IDT72V85
READ
FLB/RTB
RESET
LOGIC
DSC-3966/-
RSB
3966 drw 01

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IDT72V81 Summary of contents

Page 1

... DUAL 512 x 9, DUAL 1,024 x 9 DUAL 2,048 x 9, DUAL 4,096 X 9 DUAL 8,192 X 9 The IDT72V81 is equivalent to two IDT72V01 - 512 x 9 FIFOs The IDT72V82 is equivalent to two IDT72V02 - 1,024 x 9 FIFOs The IDT72V83 is equivalent to two IDT72V03 - 2,048 x 9 FIFOs The IDT72V84 is equivalent to two IDT72V04 - 4,096 x 9 FIFOs ...

Page 2

... For RT/RS/XI input 1.5V undershoots are allowed for 10ns once per cycle. 3966 drw 02 Symbol OUT NOTE: 1. Characterized values, not currently tested. IDT72V81 Input Pulse Levels IDT72V82 Input Rise/Fall Times IDT72V83 Input Timing Reference Levels IDT72V84 Output Reference Levels IDT72V85 Output Load ...

Page 3

... Commercial Temperature Range Commercial IDT72V81L20 IDT72V82L20 IDT72V83L20 IDT72V84L20 IDT72V85L20 Max. Min. Max. 40 — 33.3 — 30 — 15 — 20 — 10 — — 20 — — 3 — — 5 — ...

Page 4

... If the read pointer is not moved after Reset (RS), the Full-Flag (FF) will go low after 512 writes for the IDT72V81, 1,024 writes for the IDT72V82, 2,048 writes for the IDT72V83, 4,096 writes for the IDT72V84 and 8,192 writes for the IDT72V85 ...

Page 5

... IDT72V81/72V82/72V83/72V84/72V85 HF, FF NOTES: 1. EF, FF, HF may change status during Reset, but flags will be valid and around the rising edge of RS RLZ WPW LAST WRITE IGNORED WRITE WFF FF t RSC ...

Page 6

... IDT72V81/72V82/72V83/72V84/72V85 LAST READ IGNORED REF VALID DATA OUT RT W,R HF, EF FIRST WRITE ADDITIONAL READ WRITES t WEF Figure 5. Empty Flag From Last Read to First Write t RTC RTS t RTF Figure 6. Retransmit Figure 7. Minimum Timing for an Empty Flag Coincident Read Pulse Figure 8 ...

Page 7

... XIS Figure 11. Expansion In strates a four-FIFO Depth Expansion using two IDT72V81/72V82/72V83/ 72V84/72V85s. Any depth can be attained by adding additional IDT72V81/ 72V82/72V83/72V84/72V85s. These FIFOs operate in the Depth Expansion mode when the following conditions are met: 1. The first FIFO must be designated by grounding the First Load (FL) control input ...

Page 8

... Bidirectional Operation Applications which require data buffering between two systems (each system capable of Read and Write operations) can be achieved by pairing IDT72V81/72V82/72V83/72V84/72V85s as shown in Figure 16. Both Depth Expansion and Width Expansion may be used in this mode. Data Flow-Through Two types of flow-through modes are permitted, a read flow-through and write flow-through mode ...

Page 9

... IDT72V81/72V82/72V83/72V84/72V85 Single Device Configuration/Width Expansion Mode Mode Reset 0 Retransmit 1 Read/Write 1 NOTE: 1. Pointer will increment if flag is High. Depth Expansion/Compound Expansion Mode Mode Reset First Device 0 Reset All Other Devices 0 Read/Write 1 NOTE connected previous device. See Figure 14 Reset Input, FL/RT = First Load/Retransmit Empty Flag Output Full Flag Output, ...

Page 10

... IDT72V81/72V82/72V83/72V84/72V85 72V81/72V82/72V83 72V84/72V85 DEPTH EXPANSION BLOCK NOTES: 1. For depth expansion block see section on Depth Expansion and Figure 14. 2. For Flag detection see section on Width Expansion and Figure 13. SIDE 1 DATA DATA OUT IDT ...

Page 11

DATA IN DATA OUT ORDERING INFORMATION IDT XXXX X XXX Device Type Power Speed Package NOTE: 1. Industrial temperature range is available by special order. CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 *To search for ...

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