PIC16F526-I/SL Microchip Technology, PIC16F526-I/SL Datasheet - Page 24

• Manufacturer Part Number: PIC16F526-I/SL
• Description: IC PIC MCU FLASH 1KX12 14SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F526-I/SL

• Core Size: 8-Bit
• Program Memory Size: 1.5KB (1K x 12)
• Core Processor: PIC
• Speed: 20MHz
• Peripherals: POR, WDT
• Number Of I /o: 11
• Program Memory Type: FLASH
• Ram Size: 67 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 3x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Controller Family/series: PIC16F
• No. Of I/o's: 12
• Eeprom Memory Size: 64Byte
• Ram Memory Size: 67Byte
• Cpu Speed: 20MHz
• No. Of Timers: 1
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 67 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 3 Channel
• A/d Bit Size: 8 bit
• A/d Channels Available: 3
• Height: 1.25 mm
• Length: 8.65 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 3.9 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ICE2000 - EMULATOR MPLAB-ICE 2000 POD
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

PIC16F526
5.2.2
Once a cell is erased, new data can be written.
Program execution is suspended during the write cycle.
The following sequence must be performed for a single
byte write.
1.
2.
3.
4.
If the WR bit is not set in the instruction cycle after the
WREN bit is set, the WREN bit will be cleared in
hardware.
Sample code that follows this procedure is included in
Example 3.
EXAMPLE 3:
REGISTER 5-1:
REGISTER 5-2:
DS41326E-page 24
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-0
BANKSEL
MOVLW
MOVWF
MOVLW
MOVWF
BSF
BSF
EEDATA7
Load EEADR with the address.
Load EEDATA with the data to write.
Set the WREN bit to enable write access to the
array.
Set the WR bit to initiate the erase cycle.
R/W-x
U-0
—
WRITING TO FLASH DATA
MEMORY
EEADR
EE_ADR_WRITE
EEADR
EE_DATA_TO_WRITE ; LOAD DATA
EEDATA
EECON,WREN
EECON,WR
EEDATA<7:0>: 8-bits of data to be read from/written to data Flash
Unimplemented: Read as ‘0’.
EEADR<5:0>: 6-bits of data to be read from/written to data Flash
EEDATA6
MEMORY ROW
WRITING A FLASH DATA
R/W-x
U-0
—
EEDATA: FLASH DATA REGISTER
EEADR: FLASH ADDRESS REGISTER
; LOAD ADDRESS
;
; INTO EEDATA REGISTER
; ENABLE WRITES
; INITITATE ERASE
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
EEDATA5
EEADR5
R/W-x
R/W-x
EEDATA4
EEADR4
R/W-x
R/W-x
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
EEDATA3
EEADR3
R/W-x
R/W-x
5.3
Depending on the application, good programming
practice may dictate that data written to the Flash data
memory be verified. Example 4 is an example of a write
verify.
EXAMPLE 4:
MOVF
BSF
XORWF
BTFSS
GOTO
Note 1: Only a series of BSF commands will work
2: For reads, erases and writes to the Flash
Write Verify
EEDATA, W
EECON, RD
EEDATA, W
STATUS, Z
WRITE_ERR
EEDATA2
to enable the memory write sequence
documented in Example 2. No other
sequence of commands will work, no
exceptions.
data memory, there is no need to insert a
NOP into the user code as is done on mid-
range devices. The instruction immediately
following the “BSF EECON,WR/RD” will be
fetched and executed properly.
EEADR2
R/W-x
R/W-x
WRITE VERIFY OF FLASH
DATA MEMORY
 2010 Microchip Technology Inc.
;EEDATA has not changed
;from previous write
;Read the value written
;
;Is data the same
;No, handle error
;Yes, continue
x = Bit is unknown
x = Bit is unknown
EEDATA1
EEADR1
R/W-x
R/W-x
EEDATA0
EEADR0
R/W-x
R/W-x
bit 0
bit 0