PIC16F526-I/SL Microchip Technology, PIC16F526-I/SL Datasheet - Page 73

• Manufacturer Part Number: PIC16F526-I/SL
• Description: IC PIC MCU FLASH 1KX12 14SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F526-I/SL

• Core Size: 8-Bit
• Program Memory Size: 1.5KB (1K x 12)
• Core Processor: PIC
• Speed: 20MHz
• Peripherals: POR, WDT
• Number Of I /o: 11
• Program Memory Type: FLASH
• Ram Size: 67 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 3x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Controller Family/series: PIC16F
• No. Of I/o's: 12
• Eeprom Memory Size: 64Byte
• Ram Memory Size: 67Byte
• Cpu Speed: 20MHz
• No. Of Timers: 1
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 67 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 3 Channel
• A/d Bit Size: 8 bit
• A/d Channels Available: 3
• Height: 1.25 mm
• Length: 8.65 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 3.9 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ICE2000 - EMULATOR MPLAB-ICE 2000 POD
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

ADDWF
Syntax:
Operands:
Operation:
Status Affected: C, DC, Z
Description:
ANDLW
Syntax:
Operands:
Operation:
Description:
ANDWF
Syntax:
Operands:
Operation:
Status Affected: Z
Description:
 2010 Microchip Technology Inc.
Status Affected: Z
Add W and f
[ label ] ADDWF
0  f  31
d 01
(W) + (f)  (dest)
Add the contents of the W register
and register ‘f’. If ‘d’ is’0’, the result
is stored in the W register. If ‘d’ is
‘1’, the result is stored back in
register ‘f’.
AND W with f
[ label ] ANDWF
0  f  31
d [0,1]
(W) .AND. (f)  (dest)
The contents of the W register are
AND’ed with register ‘f’. If ‘d’ is ‘0’,
the result is stored in the W register.
If ‘d’ is ‘1’, the result is stored back
in register ‘f’.
AND literal with W
[ label ] ANDLW
0  k  255
(W).AND. (k)  (W)
The contents of the W register are
AND’ed with the eight-bit literal ‘k’.
The result is placed in the W
register.
f,d
f,d
k
BCF
Syntax:
Operands:
Operation:
Status Affected: None
Description:
BSF
Syntax:
Operands:
Operation:
Status Affected: None
Description:
BTFSC
Syntax:
Operands:
Operation:
Status Affected: None
Description:
Bit Clear f
[ label ] BCF
0  f  31
0  b  7
0  (f<b>)
Bit ‘b’ in register ‘f’ is cleared.
Bit Set f
[ label ] BSF
0  f  31
0  b  7
1  (f<b>)
Bit ‘b’ in register ‘f’ is set.
Bit Test f, Skip if Clear
[ label ] BTFSC f,b
0  f  31
0  b  7
skip if (f<b>) = 0
If bit ‘b’ in register ‘f’ is ‘0’, then the
next instruction is skipped.
If bit ‘b’ is ‘0’, then the next instruc-
tion fetched during the current
instruction execution is discarded,
and a NOP is executed instead,
making this a two-cycle instruction.
PIC16F526
f,b
f,b
DS41326E-page 73