PIC12F635-I/MD Microchip Technology, PIC12F635-I/MD Datasheet - Page 148

• Manufacturer Part Number: PIC12F635-I/MD
• Description: IC PIC MCU FLASH 1KX14 8DFN
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F635-I/MD

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 5
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DFN
• Controller Family/series: PIC12
• No. Of I/o's: 6
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 64Byte
• Cpu Speed: 20MHz
• No. Of Timers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164326 - MODULA SKT PM3 20QFNXLT08DFN2 - SOCKET TRANSITION ICE 14DIP/8DFNAC162057 - MPLAB ICD 2 HEADER 14DIPXLT08DFN - SOCKET TRANSITION ICE 8DFN
• Data Converters: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC12F635/PIC16F636/639
FIGURE 12-10:
12.13 Code Protection
If
programmed, the on-chip program memory can be
read out using ICSP for verification purposes.
DS41232D-page 146
(INTCON<1>)
(INTCON<7>)
Note:
INSTRUCTION FLOW
the
CLKOUT
Note 1:
Instruction
Instruction
INTF Flag
Executed
Fetched
INT pin
GIE bit
OSC1
code
2:
3:
4:
PC
(4)
The entire data EEPROM and Flash pro-
gram memory will be erased when the
code protection is turned off. See the
“PIC12F6XX/16F6XX Memory Program-
ming Specification” (DS41204) for more
information.
XT, HS or LP Oscillator mode assumed.
T
GIE = 1 assumed. In this case after wake-up, the processor jumps to 0004h. If GIE = 0, execution will continue in-line.
CLKOUT is not available in XT, HS, LP or EC Oscillator modes, but shown here for timing reference.
OST
Inst(PC) = Sleep
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1
protection
Inst(PC – 1)
= 1024 T
PC
WAKE-UP FROM SLEEP THROUGH INTERRUPT
OSC
(drawing not to scale). This delay does not apply to EC and RC Oscillator modes.
bit(s)
Inst(PC + 1)
PC + 1
Sleep
have
Processor in
not
Sleep
PC + 2
been
T
OST (2)
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Inst(PC + 2)
Inst(PC + 1)
12.14 ID Locations
Four memory locations (2000h-2003h) are designated
as ID locations where the user can store checksum or
other code identification numbers. These locations are
not accessible during normal execution but are
readable and writable during Program/Verify mode.
Only the Least Significant 7 bits of the ID locations are
used.
PC + 2
Interrupt Latency
Dummy Cycle
PC + 2
(3)
© 2007 Microchip Technology Inc.
Dummy Cycle
Inst(0004h)
0004h
Inst(0005h)
Inst(0004h)
0005h