PIC12F635-I/MD Microchip Technology, PIC12F635-I/MD Datasheet - Page 23

• Manufacturer Part Number: PIC12F635-I/MD
• Description: IC PIC MCU FLASH 1KX14 8DFN
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F635-I/MD

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 5
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DFN
• Controller Family/series: PIC12
• No. Of I/o's: 6
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 64Byte
• Cpu Speed: 20MHz
• No. Of Timers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164326 - MODULA SKT PM3 20QFNXLT08DFN2 - SOCKET TRANSITION ICE 14DIP/8DFNAC162057 - MPLAB ICD 2 HEADER 14DIPXLT08DFN - SOCKET TRANSITION ICE 8DFN
• Data Converters: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

TABLE 2-1:
© 2007 Microchip Technology Inc.
Bank 0
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Legend:
Note
Addr
INDF
TMR0
PCL
STATUS
FSR
GPIO
PCLATH
INTCON
PIR1
TMR1L
TMR1H
T1CON
WDTCON
CMCON0
CMCON1
1:
2:
Name
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
– = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition,
shaded = unimplemented
Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.
MCLR and WDT Reset do not affect the previous value data latch. The RAIF bit will be cleared upon Reset but will set again if the mis-
match exists.
Addressing this location uses contents of FSR to address data memory
(not a physical register)
Timer0 Module Register
Program Counter’s (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Holding Register for the Least Significant Byte of the 16-bit TMR1
Holding Register for the Most Significant Byte of the 16-bit TMR1
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
T1GINV
PIC12F635 SPECIAL FUNCTION REGISTERS SUMMARY BANK 0
EEIF
Bit 7
GIE
IRP
—
—
—
—
—
TMR1GE
LVDIF
COUT
PEIE
Bit 6
RP1
—
—
—
—
T1CKPS1
Bit 5
CRIF
GP5
T0IE
RP0
—
—
—
—
Write Buffer for upper 5 bits of Program Counter
T1CKPS0
WDTPS3
INTE
CINV
Bit 4
GP4
TO
—
—
PIC12F635/PIC16F636/639
T1OSCEN
WDTPS2
RAIE
Bit 3
C1IF
GP3
CIS
PD
—
WDTPS1
T1SYNC
OSFIF
Bit 2
CM2
GP2
T0IF
—
Z
WDTPS0
TMR1CS
T1GSS
INTF
Bit 1
CM1
GP1
DC
—
SWDTEN
CMSYNC
TMR1ON
TMR1IF
RAIF
Bit 0
GP0
CM0
C
(2)
xxxx xxxx
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
--xx xx00
---0 0000
0000 000x
000- 00-0
xxxx xxxx
xxxx xxxx
0000 0000
---0 1000
-0-0 0000
---- --10
POR/BOR/
Value on
WUR
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DS41232D-page 21
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32,137
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32,137
47,137
32,137
28,137
30,137
64,137
64,137
68,137
79,137
82,137
Page
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