PIC18F23K20-I/MV Microchip Technology, PIC18F23K20-I/MV Datasheet - Page 138
![IC MCU 8BIT 8KB FLASH 28UQFN](/photos/12/13/121305/c04-152_mv_sml.jpg)
PIC18F23K20-I/MV
Manufacturer Part Number
PIC18F23K20-I/MV
Description
IC MCU 8BIT 8KB FLASH 28UQFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Specifications of PIC18F23K20-I/MV
Program Memory Type
FLASH
Program Memory Size
8KB (4K x 16)
Package / Case
28-UFQFN Exposed Pad
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
16 bit
Data Ram Size
768 B
Interface Type
MSSP, I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
A/d Bit Size
10 bit
A/d Channels Available
10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
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Manufacturer
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PIC18F2XK20/4XK20
10.8
The output slew rate of each port is programmable to
select either the standard transition rate or a reduced
transition rate of 0.1 times the standard to minimize
EMI. The reduced transition time is the default slew
rate for all ports.
REGISTER 10-4:
DS41303G-page 138
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
U-0
—
2:
Port Slew Rate Control
These bits are not implemented on PIC18F2XK20 devices.
The slew rate of RA6 defaults to standard rate when the pin is used as CLKOUT.
Unimplemented: Read as ‘0’
SLRE: PORTE Slew Rate Control bit
1 = All outputs on PORTE slew at a limited rate
0 = All outputs on PORTE slew at the standard rate
SLRD: PORTD Slew Rate Control bit
1 = All outputs on PORTD slew at a limited rate
0 = All outputs on PORTD slew at the standard rate
SLRC: PORTC Slew Rate Control bit
1 = All outputs on PORTC slew at a limited rate
0 = All outputs on PORTC slew at the standard rate
SLRB: PORTB Slew Rate Control bit
1 = All outputs on PORTB slew at a limited rate
0 = All outputs on PORTB slew at the standard rate
SLRA: PORTA Slew Rate Control bit
1 = All outputs on PORTA slew at a limited rate
0 = All outputs on PORTA slew at the standard rate
U-0
—
SLRCON: SLEW RATE CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
U-0
—
SLRE
R/W-1
(1)
(1)
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SLRD
R/W-1
(2)
(1)
R/W-1
SLRC
2010 Microchip Technology Inc.
x = Bit is unknown
R/W-1
SLRB
R/W-1
SLRA
bit 0
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