ATMEGA48-20PU Atmel, ATMEGA48-20PU Datasheet - Page 140

IC AVR MCU 4K 20MHZ 5V 28DIP

ATMEGA48-20PU

Manufacturer Part Number
ATMEGA48-20PU
Description
IC AVR MCU 4K 20MHZ 5V 28DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA48-20PU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
ATMEGA48x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
2-Wire/SPI/USART/Serial
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
6-ch x 10-bit
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Total Internal Ram Size
512Byte
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
28
Package Type
PDIP
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
18. 8-bit Timer/Counter2 with PWM and asynchronous operation
18.1
18.2
2545T–AVR–05/11
Features
Overview
Timer/Counter2 is a general purpose, single channel, 8-bit Timer/Counter module. A simplified
block diagram of the 8-bit Timer/Counter is shown in
I/O pins, refer to
including I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit loca-
tions are listed in the
The PRTIM2 bit in
Timer/Counter2 module.
Figure 18-1. 8-bit timer/counter block diagram.
Single channel counter
Clear timer on compare match (auto reload)
Glitch-free, phase correct pulse width modulator (PWM)
Frequency generator
10-bit clock prescaler
Overflow and compare match interrupt sources (TOV2, OCF2A and OCF2B)
Allows clocking from external 32kHz watch crystal independent of the I/O clock
“Pinout Atmel ATmega48/88/168.” on page
“Minimizing power consumption” on page 41
“Register description” on page
Timer/counter
TCCRnA
OCRnA
TCNTn
OCRnB
=
=
Direction
Count
Clear
Control logic
TOP
=
TCCRnB
BOTTOM
Fixed
value
TOP
clk
153.
=
Tn
0
Figure
18-1. For the actual placement of
ATmega48/88/168
2. CPU accessible I/O Registers,
OCnA
(Int.req.)
OCnB
(Int.req.)
must be written to zero to enable
TOVn
(Int.req.)
Clock select
generation
generation
(From prescaler)
Waveform
Waveform
detector
Edge
OCnA
OCnB
Tn
140

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