ATTINY88-MU Atmel, ATTINY88-MU Datasheet - Page 28
![MCU AVR 8K ISP FLASH 1.8V 32-QFN](/photos/12/13/121310/attiny88-mu_sml.jpg)
ATTINY88-MU
Manufacturer Part Number
ATTINY88-MU
Description
MCU AVR 8K ISP FLASH 1.8V 32-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY88-MU
Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
28
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Processor Series
ATTINY8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
2-Wire, I2S, SPI
Maximum Clock Frequency
12 MHz
Number Of Programmable I/os
28
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATQT600, ATAVRTS2080B
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
32QFN EP
Device Core
AVR
Family Name
ATtiny
Maximum Speed
12 MHz
Operating Supply Voltage
2.5|3.3|5 V
Cpu Family
ATtiny
Device Core Size
8b
Frequency (max)
12MHz
Total Internal Ram Size
512Byte
# I/os (max)
28
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
1.8V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
QFN EP
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIPATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY88-MU
Manufacturer:
ATMEL
Quantity:
21 342
Part Number:
ATTINY88-MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATTINY88-MUR
Manufacturer:
AT
Quantity:
20 000
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6. Clock System
6.1
6.1.1
6.1.2
28
Clock Subsystems
ATtiny48/88
CPU Clock – clk
I/O Clock – clk
I/O
Figure 6-1
need not be active at a given time. In order to reduce power consumption, the clocks to modules
not being used can be halted by using different sleep modes, as described in
ment and Sleep Modes” on page
Figure 6-1.
The clock subsystems are detailed in the sections below.
The CPU clock is routed to parts of the system concerned with operation of the AVR core.
Examples of such modules are the General Purpose Register File, the Status Register and the
data memory holding the Stack Pointer. Halting the CPU clock inhibits the core from performing
general operations and calculations.
The I/O clock is used by the majority of the I/O modules such as Timer/Counters, the Serial
Peripheral Interface and the External Interrupt module. Note, that some external interrupts are
detected by asynchronous logic, meaning they are recognized even if the I/O clock is halted.
Also note that the start condition detection of the Two-Wire Interface module is asynchronous,
meaning TWI address recognition works in all sleep modes (even when clk
CPU
presents the principal clock systems in the AVR and their distribution. All of the clocks
Clock Distribution
clk
TWI
TWIHS
EXTERNAL
CLOCK
PRESCALER
SWITCH
CLOCK
CLOCK
I/O MODULES
clk
GENERAL
SOURCE CLOCK
I/O
36. The clock systems are detailed below.
CLOCK CONTROL UNIT
OSCILLATOR
WATCHDOG
ADC
RESET
LOGIC
clk
ADC
WATCHDOG
CLOCK
CORE
CPU
clk
RAM
CPU
WATCHDOG
TIMER
CALIBRATED
OSCILLATOR
FLASH AND
EEPROM
clk
FLASH
I/O
is halted).
“Power Manage-
8008G–AVR–04/11
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