AT90PWM216-16SU Atmel, AT90PWM216-16SU Datasheet - Page 218
AT90PWM216-16SU
Manufacturer Part Number
AT90PWM216-16SU
Description
MCU AVR 16K ISP FLSH 16MHZ24SOIC
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet
1.AT90PWM216-16SU.pdf
(359 pages)
Specifications of AT90PWM216-16SU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
24-SOIC (7.5mm Width)
Processor Series
AT90PWMx
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
2
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK520 - ADAPTER KIT FOR 90PWM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Internal
Manchester
Clock
Resynchronize
Internal
Manchester
Clock
Manchester
Data
Manchester
Decoder
Counter
Edge Detection
Space
Internal
Manchester
Clock
Counter
Overflow
AT90PWM216/316
Start Bit
Start Bit
N1
Figure 19-5. Manchester Frame error detection
Note:
When a Manchester framing error is detected the FEM bit and RxC bit are set at the same time.
This allows the application to execute the reception complete interrupt subroute when this error
conditon is detected.
When a Manchester framing error is detected, the EUSART receiver immediately enters in a
new start bit detection phase. Thus when a Manchester framing error is detected within a frame,
the receiver will process the rest of the frame as a new incomming frame and generate other
FEM errors.
N1/2
Counter Overflow = MBURR[H:L]
Bit 1
N2
N2/4
N2/2
front shift
Transition outside
the detect window
Bit 2
N3
Start Bit
Start Bit
N1
Bit 1
N2
The counter reaches the counter overflow
value without reaching a manchester edge
Framing Error
Bit 2
back shift
N3
7710E–AVR–08/10
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