AT90PWM216-16SU Atmel, AT90PWM216-16SU Datasheet - Page 38
AT90PWM216-16SU
Manufacturer Part Number
AT90PWM216-16SU
Description
MCU AVR 16K ISP FLSH 16MHZ24SOIC
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet
1.AT90PWM216-16SU.pdf
(359 pages)
Specifications of AT90PWM216-16SU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
24-SOIC (7.5mm Width)
Processor Series
AT90PWMx
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
2
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK520 - ADAPTER KIT FOR 90PWM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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AT90PWM216/316
The CKDIV8 Fuse determines the initial value of the CLKPS bits. If CKDIV8 is unprogrammed,
the CLKPS bits will be reset to “0000”. If CKDIV8 is programmed, CLKPS bits are reset to
“0011”, giving a division factor of 8 at start up. This feature should be used if the selected clock
source has a higher frequency than the maximum frequency of the device at the present operat-
ing conditions. Note that any value can be written to the CLKPS bits regardless of the CKDIV8
Fuse setting. The Application software must ensure that a sufficient division factor is chosen if
the selcted clock source has a higher frequency than the maximum frequency of the device at
the present operating conditions. The device is shipped with the CKDIV8 Fuse programmed.
Table 7-10.
CLKPS3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Clock Prescaler Select
CLKPS2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
CLKPS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
CLKPS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Clock Division Factor
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
128
256
16
32
64
1
2
4
8
7710E–AVR–08/10
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