PIC18F4221-I/P Microchip Technology, PIC18F4221-I/P Datasheet - Page 272

• Manufacturer Part Number: PIC18F4221-I/P
• Description: IC PIC MCU FLASH 2KX16 400IP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4221-I/P

• Program Memory Type: FLASH
• Program Memory Size: 4KB (2K x 16)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LD444-1001 - DEMO BOARD FOR PICMICRO MCUACICE0206 - ADAPTER MPLABICE 40P 600 MIL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F4321 FAMILY
FIGURE 23-7:
FIGURE 23-8:
DS39689E-page 270
TBLPTR = 0008FFh
Results: All table reads from external blocks to Blockn are disabled whenever EBTRn = 0.
Note 1: See Figure 23-5 for block boundaries.
Results: Table reads permitted within Blockn, even when EBTRBn = 0.
Note 1: See Figure 23-5 for block boundaries.
TBLPTR = 0008FFh
Register Values
Register Values
PC = 003FFEh
PC = 007FFEh
TABLAT register returns a value of ‘0’.
TABLAT register returns the value of the data at the location TBLPTR.
EXTERNAL BLOCK TABLE READ (EBTRn) DISALLOWED
EXTERNAL BLOCK TABLE READ (EBTRn) ALLOWED
Program Memory
Program Memory
Boot Block
Boot Block
Block 0
TBLRD*
Block 1
Preliminary
Block 0
Block 1
TBLRD*
(1)
(1)
Configuration Bit Settings
Configuration Bit Settings
WRTB, EBTRB = 11
WRT1, EBTR1 = 11
WRT0, EBTR0 = 10
WRTB, EBTRB = 11
WRT0, EBTR0 = 10
WRT1, EBTR1 = 11
© 2007 Microchip Technology Inc.