DSPIC30F1010-30I/SO Microchip Technology, DSPIC30F1010-30I/SO Datasheet - Page 228

• Manufacturer Part Number: DSPIC30F1010-30I/SO
• Description: IC DSPIC MCU/DSP 6K 28SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F1010-30I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 6KB (2K x 24)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240002, DM300023, DM330011
• Package: 28SOIC W
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 6-chx10-bit
• Number Of Timers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300023 - KIT DEMO DSPICDEM SMPS BUCKDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC30F4011/4012
Revision History ................................................................ 221
RTSP
S
Simple Capture Event Mode
Simple Output Compare Match Mode................................. 82
Simple PWM Mode ............................................................. 82
Single Pulse PWM Operation.............................................. 98
Software Simulator (MPLAB SIM)..................................... 168
Software Stack Pointer, Frame Pointer............................... 14
SPI Module........................................................................ 103
STATUS Register................................................................ 14
Symbols Used in Opcode Descriptions............................. 160
System Integration
T
Thermal Operating Conditions .......................................... 172
Thermal Packaging Characteristics .................................. 172
Timer1 Module
Timer2 and Timer3 Selection Mode .................................... 82
Timer2/3 Module
DS70135E-page 226
Control Registers ........................................................ 46
Operation .................................................................... 46
Capture Buffer Operation ............................................ 78
Capture Prescaler ....................................................... 78
Hall Sensor Mode ....................................................... 78
Timer2 and Timer3 Selection Mode ............................ 78
Input Pin Fault Protection............................................ 82
Period.......................................................................... 83
CALL Stack Frame...................................................... 29
Framed SPI Support ................................................. 103
Operating Function Description ................................ 103
Operation During CPU Idle Mode ............................. 105
Operation During CPU Sleep Mode .......................... 105
Register Map............................................................. 106
SDO1 Disable ........................................................... 103
Slave Select Synchronization ................................... 105
Word and Byte Communication ................................ 103
Overview ................................................................... 145
Register Map............................................................. 158
16-bit Asynchronous Counter Mode ........................... 63
16-bit Synchronous Counter Mode ............................. 63
16-bit Timer Mode ....................................................... 63
Gate Operation ........................................................... 64
Interrupt....................................................................... 65
Operation During Sleep Mode .................................... 64
Prescaler ..................................................................... 64
Real-Time Clock ......................................................... 65
Register Map............................................................... 66
16-bit Timer Mode ....................................................... 67
32-bit Synchronous Counter Mode ............................. 67
32-bit Timer Mode ....................................................... 67
ADC Event Trigger ...................................................... 70
Gate Operation ........................................................... 70
Interrupt....................................................................... 70
Operation During Sleep Mode .................................... 70
Register Map............................................................... 71
Timer Prescaler........................................................... 70
NVMADR ............................................................ 46
NVMADRU.......................................................... 46
NVMCON ............................................................ 46
NVMKEY............................................................. 46
RTC Interrupts .................................................... 65
RTC Oscillator Operation.................................... 65
Timer4/5 Module................................................................. 73
Timing Diagram
Timing Diagrams
Timing Requirements
Register Map .............................................................. 76
A/D Conversion
I
A/D Conversion
Band Gap Start-up Time........................................... 186
CAN Bit ..................................................................... 128
CAN Module I/O........................................................ 206
Center-Aligned PWM .................................................. 95
CLKO and I/O ........................................................... 184
Dead-Time Timing ...................................................... 97
Edge-Aligned PWM .................................................... 95
External Clock........................................................... 179
I
I
I
Input Capture ............................................................ 190
Motor Control PWM .................................................. 193
Motor Control PWM Module Fault ............................ 193
Output Compare ....................................................... 191
Output Compare/PWM ............................................. 192
PWM Output ............................................................... 83
QEI Module External Clock....................................... 189
QEI Module Index Pulse ........................................... 195
Reset, Watchdog Timer, Oscillator
SPI Master Mode (CKE = 0) ..................................... 196
SPI Master Mode (CKE = 1) ..................................... 197
SPI Slave Mode (CKE = 0) ....................................... 198
SPI Slave Mode (CKE = 1) ....................................... 200
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Timerx External Clock............................................... 187
A/D Conversion
Band Gap Start-up Time........................................... 186
CAN Module I/O........................................................ 206
CLKO and I/O ........................................................... 184
External Clock........................................................... 180
I
I
Input Capture ............................................................ 190
Motor Control PWM .................................................. 193
Output Compare ....................................................... 191
QEI Module External Clock....................................... 189
QEI Module Index Pulse ........................................... 195
Quadrature Decoder ................................................. 194
Reset, Watchdog Timer, Oscillator
Simple Output Compare/PWM Mode ....................... 192
2
2
2
2
2
2
C Bus Data (Slave Mode) ...................................... 204
C Bus Data (Master Mode) .................................... 202
C Bus Start/Stop Bits (Master Mode) ..................... 202
C Bus Start/Stop Bits (Slave Mode) ....................... 204
C Bus Data (Master Mode) .................................... 203
C Bus Data (Slave Mode) ...................................... 205
10-Bit High-Speed (CHPS = 01, SIMSAM = 0,
10-Bit High-Speed (CHPS = 01, SIMSAM = 0,
Start-up Timer and Power-up Timer ................. 185
(MCLR Not Tied to V
(MCLR Not Tied to V
(MCLR Tied to V
10-Bit High-Speed ............................................ 211
Start-up Timer and Power-up Timer ................. 186
ASAM = 1, SSRC = 111,
SAMC = 00001)........................................ 210
ASAM = 0, SSRC = 000) .......................... 209
© 2007 Microchip Technology Inc.
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) ......................................... 152
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), Case 1 ..................... 152
), Case 2 ..................... 152