PIC18F2331-I/SP Microchip Technology, PIC18F2331-I/SP Datasheet - Page 92

• Manufacturer Part Number: PIC18F2331-I/SP
• Description: IC PIC MCU FLASH 4KX16 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2331-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 24
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART/I2C/SPI/SSP
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, ICE2000, DM183021, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5-ch x 10-bit
• Package: 28SPDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: I3-DB18F4431 - BOARD DAUGHTER ICEPIC3AC164035 - MODULE SKT FOR 18F2X31 28SOICDVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2331/2431/4331/4431
Example 8-3 shows the sequence to do a 16 x 16
unsigned multiply. Equation 8-1 shows the algorithm
that is used. The 32-bit result is stored in four registers,
RES3:RES0.
EQUATION 8-1:
EXAMPLE 8-3:
Example 8-4 shows the sequence to do a 16 x 16
signed multiply. Equation 8-2 shows the algorithm
used. The 32-bit result is stored in four registers,
RES3:RES0. To account for the sign bits of the argu-
ments, each argument pair’s Most Significant bit (MSb)
is tested, and the appropriate subtractions are done.
DS39616B-page 90
RES3:RES0
;
;
;
MOVFARG1L, W
MULWFARG2L
MOVFFPRODH, RES1
MOVFFPRODL, RES0
MOVFARG1H, W
MULWFARG2H
MOVFFPRODH, RES3
MOVFFPRODL, RES2
MOVFARG1L, W
MULWFARG2H
MOVFPRODL, W
ADDWFRES1, F
MOVFPRODH, W
ADDWFCRES2, F
CLRFWREG
ADDWFCRES3, F
MOVFARG1H, W
MULWFARG2L
MOVFPRODL, W
ADDWFRES1, F
MOVFPRODH, W
ADDWFCRES2, F
CLRFWREG
ADDWFCRES3, F
=
=
ARG1H:ARG1L ARG2H:ARG2L
(ARG1H ARG2H 2
(ARG1H ARG2L 2
(ARG1L ARG2H 2
(ARG1L ARG2L)
16 x 16 UNSIGNED
MULTIPLICATION
ALGORITHM
16 x 16 UNSIGNED
MULTIPLY ROUTINE
; ARG1L * ARG2L ->
; PRODH:PRODL
;
;
; ARG1H * ARG2H ->
; PRODH:PRODL
;
;
; ARG1L * ARG2H ->
; PRODH:PRODL
;
; Add cross
; products
;
;
;
;
; ARG1H * ARG2L ->
; PRODH:PRODL
;
; Add cross
; products
;
;
;
8
8
16
)+
)+
)+
Preliminary
EQUATION 8-2:
EXAMPLE 8-4:
RES3:RES0
;
;
;
;
;
SIGN_ARG1
;
CONT_CODE
:
=
=
MOVF
MULWF
MOVFF
MOVFF
MOVF
MULWF
MOVFF
MOVFF
MOVF
MULWF
MOVF
ADDWF
MOVF
ADDWFC RES2,
CLRF
ADDWFC RES3,
MOVF
MULWF
MOVF
ADDWF
MOVF
ADDWFC RES2,
CLRF
ADDWFC RES3,
BTFSS
BRA
MOVF
SUBWF
MOVF
SUBWFB RES3
BTFSS
BRA
MOVF
SUBWF
MOVF
SUBWFB RES3
ARG1H:ARG1L ARG2H:ARG2L
(ARG1H ARG2H 2
(ARG1H ARG2L 2
(ARG1L ARG2H ² 2
(ARG1L ARG2L)+
(-1 ARG2H<7> ARG1H:ARG1L 2
(-1 ARG1H<7> ARG2H:ARG2L 2
ARG1L, W
ARG2L
PRODH, RES1 ;
PRODL, RES0 ;
ARG1H, W
ARG2H
PRODH, RES3 ;
PRODL, RES2 ;
ARG1L, W
ARG2H
PRODL, W
RES1,
PRODH, W
WREG
ARG1H, W
ARG2L
PRODL, W
RES1,
PRODH, W
WREG
ARG2H, 7
SIGN_ARG1
ARG1L, W
RES2
ARG1H, W
ARG1H, 7
CONT_CODE
ARG2L, W
RES2
ARG2H, W
16 x 16 SIGNED
MULTIPLICATION
ALGORITHM
16 x 16 SIGNED
MULTIPLY ROUTINE
 2003 Microchip Technology Inc.
F
F
F
F
F
F
; ARG1L * ARG2L ->
; PRODH:PRODL
; ARG1H * ARG2H ->
; PRODH:PRODL
; ARG1L * ARG2H ->
; PRODH:PRODL
;
; Add cross
; products
;
;
;
;
; ARG1H * ARG2L ->
; PRODH:PRODL
;
; Add cross
; products
;
;
;
; ARG2H:ARG2L neg?
; no, check ARG1
;
;
;
; ARG1H:ARG1L neg?
; no, done
;
;
;
8
8
16
)+
)+
)+
16
16
)+
)