DSPIC30F3014-20I/ML Microchip Technology, DSPIC30F3014-20I/ML Datasheet - Page 136

• Manufacturer Part Number: DSPIC30F3014-20I/ML
• Description: IC DSPIC MCU/DSP 24K 44QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F3014-20I/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 30
• Program Memory Size: 24KB (8K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 30
• Flash Memory Size: 24KB
• Supply Voltage Range: 2.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F301420IML

dsPIC30F3014/4013
FIGURE 19-3:
19.8
The analog input model of the 12-bit A/D converter is
shown in
A/D is a function of the internal amplifier settling time
and the holding capacitor charge time.
For the A/D converter to meet its specified accuracy,
the Charge Holding Capacitor (C
allowed to fully charge to the voltage level on the
analog input pin. The Source Impedance (R
Interconnect Impedance (R
pling Switch (R
FIGURE 19-4:
DS70138G-page 136
Instruction Execution BSET ADCON1, ASAM
ADCBUF0
ADCBUF1
ADCLK
A/D Acquisition Requirements
DONE
SAMP
Figure
Note: C
SS
19-4. The total sampling time for the
Legend: C
) Impedance combine to directly
VA
PIN
CONVERTING 1 CHANNEL AT 200 ksps, AUTO-SAMPLE START, 1 T
SAMPLING TIME
12-BIT A/D CONVERTER ANALOG INPUT MODEL
Rs
value depends on device package and is not tested. Effect of C
V
I
R
R
C
LEAKAGE
ANx
T
PIN
IC
SS
HOLD
IC
C
) and the Internal Sam-
PIN
= 1 T
T
SAMP
AD
= Input Capacitance
= Threshold Voltage
= Leakage Current at the pin due to
= Interconnect Resistance
= Sampling Switch Resistance
= Sample/Hold Capacitance (from DAC)
various junctions
HOLD
) must be
V
DD
V
V
S
T
T
), the
= 0.6V
= 0.6V
= 14 T
T
CONV
AD
= 1 T
T
R
I
 500 nA
SAMP
LEAKAGE
IC
AD
 250
affect the time required to charge the capacitor, C
The combined impedance of the analog sources must
therefore be small enough to fully charge the holding
capacitor within the chosen sample time. To minimize
the effects of pin leakage currents on the accuracy of
the A/D converter, the maximum recommended source
impedance, R
nel is selected (changed), this sampling function must
be completed prior to starting the conversion. The inter-
nal holding capacitor will be in a discharged state prior
to each sample operation.
Sampling
Switch
R
SS
S
= 14 T
, is 2.5 k. After the analog input chan-
T
PIN
CONV
R
negligible if Rs  2.5 k.
AD
SS
V
SS
C
= DAC capacitance
= 18 pF
 3 k
HOLD
 2010 Microchip Technology Inc.
AD
HOLD
.