AT91SAM7S32B-AU Atmel, AT91SAM7S32B-AU Datasheet - Page 466

• Manufacturer Part Number: AT91SAM7S32B-AU
• Description: IC MCU ARM7 32KB FLASH 48LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7S32B-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: I²C, SPI, SSC, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Cpu Family: 91S
• Device Core: ARM7TDMI
• Device Core Size: 32b
• Frequency (max): 55MHz
• Interface Type: SPI/TWI/USART
• Total Internal Ram Size: 8KB
• # I/os (max): 21
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.65/3V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Package: 48LQFP
• Family Name: AT91
• Maximum Speed: 55 MHz
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

• CPCDIS: Counter Clock Disable with RC Compare
0 = Counter clock is not disabled when counter reaches RC.
1 = Counter clock is disabled when counter reaches RC.
• EEVTEDG: External Event Edge Selection
• EEVT: External Event Selection
Note:
• ENETRG: External Event Trigger Enable
0 = The external event has no effect on the counter and its clock. In this case, the selected external event only controls the
TIOA output.
1 = The external event resets the counter and starts the counter clock.
• WAVSEL: Waveform Selection
• WAVE
0 = Waveform Mode is disabled (Capture Mode is enabled).
1 = Waveform Mode is enabled.
466
0
0
1
1
0
0
1
1
0
1
0
1
1. If TIOB is chosen as the external event signal, it is configured as an input and no longer generates waveforms and subse-
EEVTEDG
WAVSEL
AT91SAM7S Series Preliminary
EEVT
quently no IRQs.
0
1
0
1
0
1
0
1
0
0
1
1
Edge
none
rising edge
falling edge
each edge
Signal selected as external event
TIOB
XC0
XC1
XC2
Effect
UP mode without automatic trigger on RC Compare
UP mode with automatic trigger on RC Compare
UPDOWN mode without automatic trigger on RC Compare
UPDOWN mode with automatic trigger on RC Compare
input
TIOB Direction
output
output
output
(1)
6175K–ATARM–30-Aug-10