DSPIC30F3011-20I/ML Microchip Technology, DSPIC30F3011-20I/ML Datasheet - Page 65
![IC DSPIC MCU/DSP 24K 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
DSPIC30F3011-20I/ML
Manufacturer Part Number
DSPIC30F3011-20I/ML
Description
IC DSPIC MCU/DSP 24K 44QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F3010-30ISO.pdf
(228 pages)
2.DSPIC30F3010-30ISO.pdf
(18 pages)
3.DSPIC30F3010-30ISO.pdf
(6 pages)
4.DSPIC30F3010-30ISO.pdf
(16 pages)
5.DSPIC30F3010-30ISO.pdf
(22 pages)
6.DSPIC30F3010-20ISP.pdf
(226 pages)
Specifications of DSPIC30F3011-20I/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
30
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
30
Flash Memory Size
24KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F301120IML
- DSPIC30F3010-30ISO PDF datasheet
- DSPIC30F3010-30ISO PDF datasheet #2
- DSPIC30F3010-30ISO PDF datasheet #3
- DSPIC30F3010-30ISO PDF datasheet #4
- DSPIC30F3010-30ISO PDF datasheet #5
- DSPIC30F3010-20ISP PDF datasheet #6
- Current page: 65 of 228
- Download datasheet (4Mb)
8.3
The input change notification module provides the
dsPIC30F devices the ability to generate interrupt
requests to the processor in response to a Change-Of-
State (COS) on selected input pins. This module is
capable of detecting input Change-Of-States, even in
Sleep mode, when the clocks are disabled. There are
10 external signals (CN0 through CN7, CN17 and
CN18) that may be selected (enabled) for generating
an interrupt request on a Change-Of-State.
Please refer to
locations.
TABLE 8-3:
© 2010 Microchip Technology Inc.
CNEN1
CNPU1
Note 1:
SFR Name
Input Change Notification Module
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
Addr.
00C0
00C4
Pin Diagrams (Continued)
INPUT CHANGE NOTIFICATION REGISTER MAP (BITS 7-0)
CN7PUE
CN7IE
Bit 7
CN6PUE
CN6IE
Bit 6
CN5PUE
CN5IE
Bit 5
for CN pin
CN4PUE
CN4IE
Bit 4
CN3PUE
CN3IE
Bit 3
CN2PUE
dsPIC30F3010/3011
CN2IE
Bit 2
CN1PUE
CN1IE
Bit 1
CN0PUE
CN0IE
(1)
Bit 0
0000 0000 0000 0000
0000 0000 0000 0000
DS70141F-page 65
Reset State
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