ATMEGA169V-1MC Atmel, ATMEGA169V-1MC Datasheet

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ATMEGA169V-1MC

Manufacturer Part Number
ATMEGA169V-1MC
Description
IC MCU AVR 16K 1.8V 1MHZ 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA169V-1MC

Core Processor
AVR
Core Size
8-Bit
Speed
1MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
64-MLF®, 64-QFN
For Use With
ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
High Performance, Low Power AVR
Advanced RISC Architecture
Non-volatile Program and Data Memories
JTAG (IEEE std. 1149.1 compliant) Interface
Peripheral Features
Special Microcontroller Features
I/O and Packages
Operating Voltage:
Temperature range:
– 130 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 16 MIPS Throughput at 16 MHz
– On-Chip 2-cycle Multiplier
– 16K bytes of In-System Self-Programmable Flash
– Optional Boot Code Section with Independent Lock Bits
– 512 bytes EEPROM
– 1K byte Internal SRAM
– Programming Lock for Software Security
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
– 4 x 25 Segment LCD Driver
– Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture
– Real Time Counter with Separate Oscillator
– Four PWM Channels
– 8-channel, 10-bit ADC
– Programmable Serial USART
– Master/Slave SPI Serial Interface
– Universal Serial Interface with Start Condition Detector
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Interrupt and Wake-up on Pin Change
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated Oscillator
– External and Internal Interrupt Sources
– Five Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, and
– 53 Programmable I/O Lines
– 64-lead TQFP and 64-pad MLF
– 1.8 - 5.5V for ATmega169V
– 2.7 - 5.5V for ATmega169L
– 4.5 - 5.5V for ATmega169
– -40°C to 85°C Industrial
Mode
Standby
Endurance: 10,000 Write/Erase Cycles
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
Endurance: 100,000 Write/Erase Cycles
®
8-Bit Microcontroller
Note: This is a summary document. A complete document is
available on our web site at www.atmel.com .
8-bit
Microcontroller
with 16K Bytes
In-System
Programmable
Flash
ATmega169V
ATmega169L
ATmega169
Advance
Information
Summary
Rev. 2514HS–AVR–05/03
2514HS–AVR–05/03
1

Related parts for ATMEGA169V-1MC

ATMEGA169V-1MC Summary of contents

Page 1

... I/O and Packages – 53 Programmable I/O Lines – 64-lead TQFP and 64-pad MLF • Operating Voltage: – 1.8 - 5.5V for ATmega169V – 2.7 - 5.5V for ATmega169L – 4.5 - 5.5V for ATmega169 • Temperature range: – -40°C to 85°C Industrial ® ...

Page 2

... Features (Continued) • Speed Grade: – MHz for ATmega169V – MHz for ATmega169L – MHz for ATmega169 • Ultra-Low Power Consumption – Active Mode: 1 MHz, 1.8V: 400µA 32 kHz, 1.8V: 20µA (including Oscillator) 32 kHz, 1.8V: 40µA (including Oscillator and LCD) – Power-down Mode: 0.5µ ...

Page 3

... STATUS REGISTER SPI DATA REGISTER DATA DIR. DATA REGISTER REG. PORTB PORTB PORTD PORTB DRIVERS PORTD DRIVERS PB0 - PB7 PD0 - PD7 ATmega169V/L PC0 - PC7 PORTC DRIVERS DATA DIR. REG. PORTC CALIB. OSC OSCILLATOR TIMING AND CONTROL LCD CONTROLLER/ DRIVER DATA DIR. ...

Page 4

... The ATmega169 AVR is supported with a full suite of program and system development tools including: C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Cir- cuit Emulators, and Evaluation kits. ATmega169V/L 4 2514HS–AVR–05/03 ...

Page 5

... Port F (PF7..PF0) Port F serves as the analog inputs to the A/D Converter. Port F also serves as an 8-bit bi-directional I/O port, if the A/D Converter is not used. Port pins can provide internal pull-up resistors (selected for each bit). The Port F output 2514HS–AVR–05/03 ATmega169V/L 5 ...

Page 6

... Be aware that not all C compiler vendors include bit defini- tions in the header files and interrupt handling compiler dependent. Please confirm with the C compiler documentation for more details. ATmega169V even if the ADC is not used. If the ADC is used, it should be con- CC through a low-pass filter ...

Page 7

... USART I/O Data Register USART Baud Rate Register Low – – – – UMSEL UPM1 UPM0 USBS TXCIE UDRIE RXEN TXEN TXC UDRE FE DOR ATmega169V/L Bit 2 Bit 1 Bit 0 – – – – – SEG324 SEG318 SEG317 SEG316 SEG310 SEG309 SEG308 SEG302 SEG301 SEG300 – ...

Page 8

... TCNT1L (0x83) Reserved – (0x82) TCCR1C FOC1A (0x81) TCCR1B ICNC1 (0x80) TCCR1A COM1A1 COM1A0 (0x7F) DIDR1 – (0x7E) DIDR0 ADC7D ATmega169V/L 8 Bit 6 Bit 5 Bit 4 Bit 3 – – – – – – – – – – – – – – – ...

Page 9

... EEPROM Address Register Low Byte EEPROM Data Register – – – EERIE General Purpose I/O Register 0 PCIE0 – – – PCIF0 – – – ATmega169V/L Bit 2 Bit 1 Bit 0 – – – MUX2 MUX1 MUX0 ADTS2 ADTS1 ADTS0 ADPS2 ADPS1 ADPS0 – ...

Page 10

... Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The ATmega169 is a com- plex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used. ATmega169V/L 10 Bit 6 Bit 5 ...

Page 11

... PC PC (SREG( then PC PC then then then then then then then then then then then then then then then then PC ATmega169V/L Operation Flags Z,C,N,V,H Z,C,N,V,H Z,C,N,V,S Z,C,N,V,H Z,C,N,V,H Z,C,N,V,H Z,C,N,V,H Z,C,N,V,S Z,N,V Z,N,V Z,N,V Z,N,V Z,N,V Rd Z,C,N,V Rd Z,C,N,V,H Z,N,V ...

Page 12

... Load Program Memory LPM Rd, Z+ Load Program Memory and Post-Inc SPM Store Program Memory IN Rd Port OUT P, Rr Out Port PUSH Rr Push Register on Stack ATmega169V/L 12 Description then then PC I/O(P,b) 1 I/O(P,b) 0 Rd(n+1) Rd(n), Rd(0) Rd(n) Rd(n+1), Rd(7) Rd(0) C,Rd(n+1) Rd(7) C,Rd(n) Rd(n) Rd(n+1), n=0 ...

Page 13

... MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break 2514HS–AVR–05/03 Description Rd STACK (see specific descr. for Sleep function) (see specific descr. for WDR/timer) For On-chip Debug Only ATmega169V/L Operation Flags #Clocks None None None None None N/A 13 ...

Page 14

... Thin (1.0 mm) Plastic Gull Wing Quad Flat Package (TQFP) 64M1 64-pad 1.0 mm body, lead pitch 0.50 mm, Micro Lead Frame Package (MLF) ATmega169V/L 14 Ordering Code Package ATmega169V-1AI 64A ATmega169V-1MI 64M1 ATmega169L-8AI 64A ATmega169L-8MI 64M1 ATmega169-16AI 64A ATmega169-16MI 64M1 Package Type ...

Page 15

... Orchard Parkway San Jose, CA 95131 R 2514HS–AVR–05/03 B PIN 1 IDENTIFIER TITLE 64A, 64-lead Body Size, 1.0 mm Body Thickness, 0.8 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) ATmega169V/L A COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE A – – 1.20 A1 0.05 – ...

Page 16

... D Marked Pin TOP VIEW BOTTOM VIEW Note: JEDEC Standard MO-220, Fig. 1, VMMD. 2325 Orchard Parkway San Jose, CA 95131 R ATmega169V Pin #1 Corner TITLE 64M1, 64-pad 1.0 mm Body, Lead Pitch 0.50 mm Micro Lead Frame Package (MLF) C SEATING PLANE A1 A 0.08 C SIDE VIEW ...

Page 17

... USART when TXEN is written to zero. Problem Fix/Workaround Ensure that the transmission is complete before writing TXEN to zero (this will be fixed in rev. C). The ADC does not work as intended. There is a positive offset in the result. Problem Fix/Workaround This will be fixed in rev. C. ATmega169V ...

Page 18

... High Current Consumption In Power Down when JTAGEN is Programmed 3. LCD Contrast Control 2. Some Data Combinations Can Result in Dim Segments on the LCD 1. LCD Current Consumption ATmega169V/L 18 When entering Serial Programming mode the second byte will not echo back as described in the Serial Programming algorithm. ...

Page 19

... The USI I/O Registers are in the extended I/O space and OUT SCKmax cannot be used. LDS and STS take one more cycle when executed had to be changed accordingly. from Figure 114 on page 241 and Table 105 on page 242, because these sig- nals do not exist in boundary scan. page 5. ATmega169V/L SCKmax 19 ...

Page 20

... Removed all references to the PG5 pin in Figure 1 on page 2, Figure 2 on page 3. Updated Table 118, “Extended Fuse Byte,” on page 267. 4. Added Errata for “ATmega169 Rev C” on page 18, including “Significan Data 5. Updated the “Ordering Information” on page 14 to include the new speed ATmega169V/L 20 page 174. Settings,” on page 173. ...

Page 21

... Removed TBDs from Table 16 on page 37, Table 19 on page 41, Table 133 on page 299. 238 regarding WRITE PINx REGISTER. Serial Interface – USI” on page 178. Also updated “Start Condition Detector” on page 184 and “USI Control Register – USICR” on page 186. on page 205. 303. 233. ATmega169V/L 21 ...

Page 22

... No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems. ...

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