PIC24HJ64GP506A-I/PT Microchip Technology, PIC24HJ64GP506A-I/PT Datasheet - Page 207

IC PIC MCU FLASH 64KB 64-TQFP

PIC24HJ64GP506A-I/PT

Manufacturer Part Number
PIC24HJ64GP506A-I/PT
Description
IC PIC MCU FLASH 64KB 64-TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ64GP506A-I/PT

Core Size
16-Bit
Program Memory Size
64KB (22K x 24)
Core Processor
PIC
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 18x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC24
No. Of I/o's
53
Ram Memory Size
8KB
Cpu Speed
40MHz
No. Of Timers
9
Interface
CAN, I2C, SPI, UART
Embedded Interface Type
CAN, I2C, SPI, UART
Rohs Compliant
Yes
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8192 B
Interface Type
SPI, I2C, UART
Maximum Clock Frequency
7.37 MHz
Number Of Timers
13
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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20.0
The PIC24HJXXXGPX06A/X08A/X10A devices have
up to 32 Analog-to-Digital input channels. These
devices also have up to 2 Analog-to-Digital converter
modules (ADCx, where ‘x’ = 1 or 2), each with its own
set of Special Function Registers.
The AD12B bit (ADxCON1<10>) allows each of the
ADC modules to be configured by the user as either a
10-bit, 4-sample/hold ADC (default configuration) or a
12-bit, 1-sample/hold ADC.
20.1
The 10-bit ADC configuration has the following key
features:
• Successive Approximation (SAR) conversion
• Conversion speeds of up to 1.1 Msps
• Up to 32 analog input pins
• External voltage reference input pins
• Simultaneous sampling of up to four analog input
• Automatic Channel Scan mode
• Selectable conversion trigger source
• Selectable Buffer Fill modes
• Two result alignment options (signed/unsigned)
• Operation during CPU Sleep and Idle modes
The 12-bit ADC configuration supports all the above
features, except:
• In the 12-bit configuration, conversion speeds of
• There is only 1 sample/hold amplifier in the 12-bit
 2009 Microchip Technology Inc.
Note:
pins
up to 500 ksps are supported
configuration, so simultaneous sampling of
multiple channels is not supported.
Note 1: This data sheet summarizes the features
2: Some registers and associated bits
10-BIT/12-BIT
ANALOG-TO-DIGITAL
CONVERTER (ADC)
Key Features
The ADC module needs to be disabled
before modifying the AD12B bit.
of the PIC24HJXXXGPX06A/X08A/X10A
family of devices. However, it is not
intended to be a comprehensive refer-
ence source. To complement the informa-
tion in this data sheet, refer to the
“dsPIC33F/PIC24H Family Reference
Manual”, Section 16. “Analog-to-Digital
Converter (ADC)” (DS70225), which is
available from the Microchip website
(www.microchip.com).
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
PIC24HJXXXGPX06A/X08A/X10A
Preliminary
Depending on the particular device pinout, the Ana-
log-to-Digital Converter can have up to 32 analog input
pins, designated AN0 through AN31. In addition, there
are two analog input pins for external voltage reference
connections. These voltage reference inputs may be
shared with other analog input pins. The actual number
of analog input pins and external voltage reference
input configuration will depend on the specific device.
Refer to the device data sheet for further details.
A block diagram of the Analog-to-Digital Converter is
shown in Figure 20-1.
20.2
The following configuration steps should be performed.
1.
2.
20.3
If more than one conversion result needs to be buffered
before triggering an interrupt, DMA data transfers can
be used. Both ADC1 and ADC2 can trigger a DMA data
transfer. If ADC1 or ADC2 is selected as the DMA IRQ
source, a DMA transfer occurs when the AD1IF or
AD2IF bit gets set as a result of an ADC1 or ADC2
sample conversion sequence.
The SMPI<3:0> bits (ADxCON2<5:2>) are used to
select how often the DMA RAM buffer pointer is
incremented.
The ADDMABM bit (ADxCON1<12>) determines how
the conversion results are filled in the DMA RAM buffer
area being used for ADC. If this bit is set, DMA buffers
are written in the order of conversion. The module will
provide an address to the DMA channel that is the
same as the address used for the non-DMA
stand-alone buffer. If the ADDMABM bit is cleared, then
DMA buffers are written in Scatter/Gather mode. The
module will provide a scatter/gather address to the
DMA channel, based on the index of the analog input
and the size of the DMA buffer.
Configure the ADC module:
a)
b)
c)
d)
e)
f)
g)
Configure ADC interrupt (if required):
a)
b)
Analog-to-Digital Initialization
Select
(ADxPCFGH<15:0> or ADxPCFGL<15:0>)
Select voltage reference source to match
expected
(ADxCON2<15:13>)
Select the analog conversion clock to
match desired data rate with processor
clock (ADxCON3<7:0>)
Determine how many S/H channels will
be
ADxPCFGH<15:0> or ADxPCFGL<15:0>)
Select the appropriate sample/conversion
sequence
ADxCON3<12:8>)
Select
presented in the buffer (ADxCON1<9:8>)
Turn on the ADC module (ADxCON1<15>)
Clear the ADxIF bit
Select ADC interrupt priority
ADC and DMA
used
port
how
range
pins
(ADxCON1<7:5>
conversion
(ADxCON2<9:8>
on
as
DS70592B-page 207
analog
analog
results
inputs
inputs
and
and
are

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