PIC18F4455-I/PT Microchip Technology, PIC18F4455-I/PT Datasheet

IC PIC MCU FLASH 12KX16 44TQFP

PIC18F4455-I/PT

Manufacturer Part Number
PIC18F4455-I/PT
Description
IC PIC MCU FLASH 12KX16 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4455-I/PT

Program Memory Type
FLASH
Program Memory Size
24KB (12K x 16)
Package / Case
44-TQFP, 44-VQFP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
256 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
24 KB
Interface Type
SPI, I2C, EAUSART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
35
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163025
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Package
44TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPI3-DB18F4550 - BOARD DAUGHTER ICEPIC3DM163025 - PIC DEM FULL SPEED USB DEMO BRDAC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F4455-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F4455-I/PT
Manufacturer:
MICROCH
Quantity:
20 000
The PIC18F2455/2550/4455/4550 parts you have
received conform functionally to the Device Data Sheet
(DS39632D), except for the anomalies described
below. Any Data Sheet Clarification issues related to
the PIC18F2455/2550/4455/4550 will be reported in a
separate Data Sheet errata. Please check the
Microchip web site for any existing issues.
The
PIC18F2455/2550/4455/4550 devices with these
Device/Revision IDs:
1. Module: EUSART
© 2008 Microchip Technology Inc.
The Device IDs (DEVID1 and DEVID2) are located at
addresses
configuration space. They are shown in binary in the
format “DEVID2 DEVID1”.
Part Number
PIC18F2455
PIC18F2550
PIC18F4455
PIC18F4550
When performing back-to-back transmission in
9-bit mode (TX9D bit in the TXSTA register is
set), an ongoing transmission’s timing can be
corrupted if the TX9D bit (for the next transmis-
sion) is not written immediately following the
setting of TXIF. This is because any write to the
TXSTA register results in a reset of the Baud
Rate Generator which will effect any ongoing
transmission.
Work around
Load TX9D just after TXIF is set, either by polling
TXIF or by writing TX9D at the beginning of the
Interrupt Service Routine, or only write to TX9D
when
(TRMT = 1).
Date Codes that pertain to this issue:
All engineering and production devices.
following
PIC18F2455/2550/4455/4550 Rev. A3 Silicon Errata
a
3FFFFEh:3FFFFFh
transmission
silicon
0001 0010 011
0001 0010 010
0001 0010 001
0001 0010 000
Device ID
errata apply
is
in
not
Revision ID
the
in
0 0010
0 0010
0 0010
0 0010
PIC18F2455/2550/4455/4550
only
device’s
progress
to
2. Module: Timer1/Timer3
3. Module: MSSP
When Timer1/Timer3 is operating in 16-bit mode
and the prescale setting is not 1:1, a write to the
TMR1H/TMR3H Buffer registers may lengthen the
duration of the period between the increments of
the timer for the period in which TMR1H/TMR3H
were written.
Work around
Two work arounds are available: 1) Stop Timer1/
Timer3 before writing the TMR1H/TMR3H regis-
ters; 2) Write TMR1L/TMR3L immediately after
writing TMR1H/TMR3H.
Date Codes that pertain to this issue:
All engineering and production devices.
In Slave Transmit mode, when a transmission is
initiated, the SSPBUF register may be written for
up to 10 T
The data transfer may be corrupted if SSPBUF is
written during this time.
The WCOL bit is set any time an SSPBUF write
occurs during a transfer.
Work around
Avoid writing SSPBUF until the data transfer is
complete, indicated by the setting of the SSPIF bit
(PIR1<3>).
Verify the WCOL bit (SSPCON1<7>) is clear after
writing SSPBUF to ensure any potential transfer in
progress is not corrupted.
Date Codes that pertain to this issue:
All engineering and production devices.
CY
before additional writes are blocked.
DS80220J-page 1

Related parts for PIC18F4455-I/PT

PIC18F4455-I/PT Summary of contents

Page 1

... PIC18F2455/2550/4455/4550 devices with these Device/Revision IDs: Part Number Device ID PIC18F2455 0001 0010 011 PIC18F2550 0001 0010 010 PIC18F4455 0001 0010 001 PIC18F4550 0001 0010 000 The Device IDs (DEVID1 and DEVID2) are located at addresses 3FFFFEh:3FFFFFh in configuration space. They are shown in binary in the format “ ...

Page 2

... Example 1 can be used. This example overwrites the Fast Return register by making a dummy call to Foo with the fast option in the high priority service routine. Date Codes that pertain to this issue: All engineering and production devices. © 2008 Microchip Technology Inc. ...

Page 3

... LowVector (void) { _asm goto MyLowISR _endasm } #pragma code /* return to default code section */ © 2008 Microchip Technology Inc. PIC18F2455/2550/4455/4550 directive instructs the compiler to not use the RETFIE FAST instruction. If the proper high priority interrupt bit is set in the IPRx register, then the interrupt is treated as high priority in spite of the pragma interruptlow directive ...

Page 4

... Example 3. This example illustrates how it reduces the instruction cycle count from 10 cycles to 3: EXAMPLE 3: #pragma code high_vector_section=0x8 void high_vector (void) { _asm CALL high_vector_branch, 1 _endasm } void high_vector_branch (void) { _asm POP GOTO high_isr _endasm } #pragma interrupt high_isr void high_isr (void) { ... } DS80220J-page 4 © 2008 Microchip Technology Inc. ...

Page 5

... ECCPASE bit (ECCP1AS<7>) after the shutdown condition expires. Date Codes that pertain to this issue: All engineering and production devices. © 2008 Microchip Technology Inc. PIC18F2455/2550/4455/4550 7. Module: ECCP When operating either Timer1 or Timer3 as a counter with a prescale value other than 1:1 and ...

Page 6

... Required Modification: Move UCONbits.PKTDIS = 0, which is located at the end of the function, to the start of the function instead. Date Codes that pertain to this issue: All engineering and production devices. Units Conditions LSb and V - REF REF REF LSb and V REF SS DD © 2008 Microchip Technology Inc. ...

Page 7

... Idle state for clock (CK low level Work around None. Date Codes that pertain to this issue: All engineering and production devices. © 2008 Microchip Technology Inc. PIC18F2455/2550/4455/4550 14. Module: USB The Ping-Pong Buffer mode in which the ping-pong buffers are enabled for Endpoints (UCFG<PPB1:PPB0> = 11) is not supported. ...

Page 8

... Set up the timer to overflow at the end of Stop bit, then start the timer when you load the TXREG. Do not load the TXREG when timer is about to overflow. Date Codes that pertain to this issue: All engineering and production devices. © 2008 Microchip Technology Inc. ...

Page 9

... Poll the WUE bit and read RCREG after the WUE bit is automatically cleared. Date Codes that pertain to this issue: All engineering and production devices. © 2008 Microchip Technology Inc. PIC18F2455/2550/4455/4550 23. Module: Timer1 In 16-Bit Asynchronous Counter mode (with or without use of the Timer1 oscillator), the TMR1H and TMR3H buffers do not update when TMRxL is read ...

Page 10

... Date Codes that pertain to this issue: All engineering and production devices. SCK PULSE VARIATION USING TIMER2 bit bit bit AVOIDING THE INITIAL SHORT SCK PULSE ;Data received? ;(Xmit complete?) ; SSPBUF ;Save in user RAM ;W = TXDATA ;Clear Timer2 ;Xmit New data © 2008 Microchip Technology Inc. ...

Page 11

... modes. OSC Date Codes that pertain to this issue: All engineering and production devices. © 2008 Microchip Technology Inc. PIC18F2455/2550/4455/4550 31. Module: Brown-out Reset (BOR) If either the HLVD or USB modules are enabled, clearing the SBOREN bit (RCON<6>) when the soft- ware ...

Page 12

... SPI Mode). Rev G Document (07/2007) Added silicon issues 29 (EUSART) and 30 (ADC). Rev H Document (03/2008) Added silicon issue 31 (Brown-out Reset – BOR). Rev J Document (09/2008) Revised issue 24 (Reset) and added issue 32 (MSSP). DS80220J-page 12 © 2008 Microchip Technology Inc. ...

Page 13

... PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 14

... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2008 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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