AT91SAM7S321-MU Atmel, AT91SAM7S321-MU Datasheet - Page 136

• Manufacturer Part Number: AT91SAM7S321-MU
• Description: MCU ARM 32K HI SPD FLASH 64-QFN
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7S321-MU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, I2S, SPI, SSC, TWI, UART, USB
• Maximum Clock Frequency: 55 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 10 bit
• Operating Supply Voltage: 1.8 V to 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM7S-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7S-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

20.3
20.3.1
Table 20-20. Signal Description List
136
Signal Name
VDDFLASH
VDDIO
VDDCORE
VDDPLL
GND
XIN
Serial Fast Flash Programming
AT91SAM7S Series Preliminary
Device Configuration
Function
Flash Power Supply
I/O Lines Power Supply
Core Power Supply
PLL Power Supply
Ground
Main Clock Input.
This input can be tied to GND. In this
case, the device is clocked by the internal
RC oscillator.
The Serial Fast Flash programming interface is based on IEEE Std. 1149.1 “Standard Test
Access Port and Boundary-Scan Architecture”. Refer to this standard for an explanation of terms
used in this chapter and for a description of the TAP controller states.
In this mode, data read/written from/to the embedded Flash of the device are transmitted
through the JTAG interface of the device.
In Serial Fast Flash Programming Mode, the device is in a specific test mode. Only a distinct set
of pins is significant. Other pins must be left unconnected.
Figure 20-7. Serial Programming
0-50MHz
VDDIO
VDDIO
VDDIO
GND
TDO
TMS
TCK
TDI
Clocks
Power
TST
PGMEN0
PGMEN1
PGMEN2
XIN
Ground
Power
Power
Power
Power
Type
Input
Active
Level
Comments
32 kHz to 50 MHz
VDDCORE
VDDIO
VDDPLL
VDDFLASH
GND
6175K–ATARM–30-Aug-10