AT91SAM7S321-MU Atmel, AT91SAM7S321-MU Datasheet - Page 709

MCU ARM 32K HI SPD FLASH 64-QFN

AT91SAM7S321-MU

Manufacturer Part Number
AT91SAM7S321-MU
Description
MCU ARM 32K HI SPD FLASH 64-QFN
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM7S321-MU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, I2S, SPI, SSC, TWI, UART, USB
Maximum Clock Frequency
55 MHz
Number Of Programmable I/os
32
Number Of Timers
10 bit
Operating Supply Voltage
1.8 V to 3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7S-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7S-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7S321-MU
Manufacturer:
ATMEL
Quantity:
9 500
40.17.2.3
40.17.3
40.17.3.1
6175K–ATARM–30-Aug-10
Real Time Timer (RTT)
PWM: Counter Start Value
RTT: Possible Event Loss when Reading RTT_SR
In left aligned mode, the first start value of the counter is 0. For the other periods, the counter
starts at 1.
None.
If an event (RTTINC or ALMS) occurs within the same slow clock cycle during which the
RTT_SR is read, the corresponding bit might be cleared. This can lead to the loss of this event.
The software must handle the RTT event as an interrupt and should not poll RTT_SR.
Problem Fix/Workaround
Problem Fix/Workaround:
AT91SAM7S Series Preliminary
709

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